From: Marc Zyngier <maz@kernel.org>
To: Anup Patel <anup@brainfault.org>
Cc: Guo Ren <guoren@kernel.org>, Atish Patra <atish.patra@wdc.com>,
Thomas Gleixner <tglx@linutronix.de>,
Palmer Dabbelt <palmer@dabbelt.com>,
"linux-kernel@vger.kernel.org List"
<linux-kernel@vger.kernel.org>,
linux-riscv <linux-riscv@lists.infradead.org>,
Guo Ren <guoren@linux.alibaba.com>,
Vincent Pelletier <plr.vincent@gmail.com>,
Nikita Shubin <nikita.shubin@maquefel.me>
Subject: Re: [PATCH V6] irqchip/sifive-plic: Fixup EOI failed when masked
Date: Thu, 04 Nov 2021 14:57:22 +0000 [thread overview]
Message-ID: <871r3w9df1.wl-maz@kernel.org> (raw)
In-Reply-To: <CAAhSdy29qhF4JHuMOqwctn+=HQNBbR3X0gsymqD8OAF1pXE43A@mail.gmail.com>
On Thu, 04 Nov 2021 14:40:42 +0000,
Anup Patel <anup@brainfault.org> wrote:
>
> On Mon, Nov 1, 2021 at 6:47 PM <guoren@kernel.org> wrote:
> >
> > From: Guo Ren <guoren@linux.alibaba.com>
> >
> > When using "devm_request_threaded_irq(,,,,IRQF_ONESHOT,,)" in the driver,
> > only the first interrupt could be handled, and continue irq is blocked by
> > hw. Because the riscv plic couldn't complete masked irq source which has
> > been disabled in enable register. The bug was firstly reported in [1].
> >
> > Here is the description of Interrupt Completion in PLIC spec [2]:
> >
> > The PLIC signals it has completed executing an interrupt handler by
> > writing the interrupt ID it received from the claim to the claim/complete
> > register. The PLIC does not check whether the completion ID is the same
> > as the last claim ID for that target. If the completion ID does not match
> > an interrupt source that is currently enabled for the target, the
> > ^^ ^^^^^^^^^ ^^^^^^^
> > completion is silently ignored.
> >
> > [1] http://lists.infradead.org/pipermail/linux-riscv/2021-July/007441.html
> > [2] https://github.com/riscv/riscv-plic-spec/blob/8bc15a35d07c9edf7b5d23fec9728302595ffc4d/riscv-plic.adoc
> >
> > Reported-by: Vincent Pelletier <plr.vincent@gmail.com>
> > Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
> > Cc: Anup Patel <anup@brainfault.org>
> > Cc: Thomas Gleixner <tglx@linutronix.de>
> > Cc: Marc Zyngier <maz@kernel.org>
> > Cc: Palmer Dabbelt <palmer@dabbelt.com>
> > Cc: Atish Patra <atish.patra@wdc.com>
> > Cc: Nikita Shubin <nikita.shubin@maquefel.me>
> > Cc: incent Pelletier <plr.vincent@gmail.com>
>
> Please include a Fixes: tag
>
> Also, I see that you have dropped the DT bindings patch. We still
> need separate compatible string for T-HEAD PLIC because OpenSBI
> will use it for other work-arounds.
>
> I suggest to include to more patches in this series:
> 1) Your latest T-HEAD PLIC DT bindings patch
> 2) Separate patch to use T-HEAD PLIC compatible in PLIC driver
No, please keep things separate. The PLIC is broken *today*, and I
want to take a patch for -rc1. The rest (compatible and such) is a new
feature and can wait until 5.17.
M.
--
Without deviation from the norm, progress is not possible.
next prev parent reply other threads:[~2021-11-04 14:57 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-01 13:17 [PATCH V6] irqchip/sifive-plic: Fixup EOI failed when masked guoren
2021-11-01 13:47 ` Nikita Shubin
2021-11-02 1:34 ` Guo Ren
2021-11-04 14:40 ` Anup Patel
2021-11-04 14:57 ` Marc Zyngier [this message]
2021-11-05 1:06 ` Guo Ren
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