From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4C31CC433EF for ; Thu, 4 Nov 2021 14:57:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3630A611C4 for ; Thu, 4 Nov 2021 14:57:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231361AbhKDPAE (ORCPT ); Thu, 4 Nov 2021 11:00:04 -0400 Received: from mail.kernel.org ([198.145.29.99]:34588 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230344AbhKDPAC (ORCPT ); Thu, 4 Nov 2021 11:00:02 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id EE1B5611C3; Thu, 4 Nov 2021 14:57:24 +0000 (UTC) Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1mieB8-003USb-P8; Thu, 04 Nov 2021 14:57:22 +0000 Date: Thu, 04 Nov 2021 14:57:22 +0000 Message-ID: <871r3w9df1.wl-maz@kernel.org> From: Marc Zyngier To: Anup Patel Cc: Guo Ren , Atish Patra , Thomas Gleixner , Palmer Dabbelt , "linux-kernel@vger.kernel.org List" , linux-riscv , Guo Ren , Vincent Pelletier , Nikita Shubin Subject: Re: [PATCH V6] irqchip/sifive-plic: Fixup EOI failed when masked In-Reply-To: References: <20211101131736.3800114-1-guoren@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: anup@brainfault.org, guoren@kernel.org, atish.patra@wdc.com, tglx@linutronix.de, palmer@dabbelt.com, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, guoren@linux.alibaba.com, plr.vincent@gmail.com, nikita.shubin@maquefel.me X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 04 Nov 2021 14:40:42 +0000, Anup Patel wrote: > > On Mon, Nov 1, 2021 at 6:47 PM wrote: > > > > From: Guo Ren > > > > When using "devm_request_threaded_irq(,,,,IRQF_ONESHOT,,)" in the driver, > > only the first interrupt could be handled, and continue irq is blocked by > > hw. Because the riscv plic couldn't complete masked irq source which has > > been disabled in enable register. The bug was firstly reported in [1]. > > > > Here is the description of Interrupt Completion in PLIC spec [2]: > > > > The PLIC signals it has completed executing an interrupt handler by > > writing the interrupt ID it received from the claim to the claim/complete > > register. The PLIC does not check whether the completion ID is the same > > as the last claim ID for that target. If the completion ID does not match > > an interrupt source that is currently enabled for the target, the > > ^^ ^^^^^^^^^ ^^^^^^^ > > completion is silently ignored. > > > > [1] http://lists.infradead.org/pipermail/linux-riscv/2021-July/007441.html > > [2] https://github.com/riscv/riscv-plic-spec/blob/8bc15a35d07c9edf7b5d23fec9728302595ffc4d/riscv-plic.adoc > > > > Reported-by: Vincent Pelletier > > Signed-off-by: Guo Ren > > Cc: Anup Patel > > Cc: Thomas Gleixner > > Cc: Marc Zyngier > > Cc: Palmer Dabbelt > > Cc: Atish Patra > > Cc: Nikita Shubin > > Cc: incent Pelletier > > Please include a Fixes: tag > > Also, I see that you have dropped the DT bindings patch. We still > need separate compatible string for T-HEAD PLIC because OpenSBI > will use it for other work-arounds. > > I suggest to include to more patches in this series: > 1) Your latest T-HEAD PLIC DT bindings patch > 2) Separate patch to use T-HEAD PLIC compatible in PLIC driver No, please keep things separate. The PLIC is broken *today*, and I want to take a patch for -rc1. The rest (compatible and such) is a new feature and can wait until 5.17. M. -- Without deviation from the norm, progress is not possible.