Re: [patch 4/8] PCI/MSI: Enforce MSI[X] entry updates to be visible

Marc Zyngier
2021-07-23T08:14:16Z

On Thu, 22 Jul 2021 22:54:48 +0100,
Andy Shevchenko <andy.shevchenko@gmail.com> wrote:
>
> [1 <text/plain; UTF-8 (7bit)>]
> On Friday, July 23, 2021, Bjorn Helgaas <helgaas@kernel.org> wrote:
>
> > On Wed, Jul 21, 2021 at 09:11:30PM +0200, Thomas Gleixner wrote:
> > > Nothing enforces the posted writes to be visible when the function
> > > returns. Flush them even if the flush might be redundant when the entry
> > is
> > > masked already as the unmask will flush as well. This is either setup or
> > a
> > > rare affinity change event so the extra flush is not the end of the
> > world.
> > >
> > > While this is more a theoretical issue especially the X86 MSI affinity
> > > stter mechanism relies on the assumption that the update has reached the
> >
> > stter?
>
>
> Setter I suppose

My bet is on 'steer', given that this is about affinity management.

M.

--
Without deviation from the norm, progress is not possible.