From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751234AbbIJU6l (ORCPT ); Thu, 10 Sep 2015 16:58:41 -0400 Received: from smtp11.smtpout.orange.fr ([80.12.242.133]:55942 "EHLO smtp.smtpout.orange.fr" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750994AbbIJU6j (ORCPT ); Thu, 10 Sep 2015 16:58:39 -0400 X-ME-Helo: belgarion X-ME-Auth: amFyem1pay5yb2JlcnRAb3JhbmdlLmZy X-ME-Date: Thu, 10 Sep 2015 22:58:38 +0200 X-ME-IP: 109.220.179.182 From: Robert Jarzmik To: Russell King - ARM Linux Cc: Dave Martin , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH] ARM: fix alignement of __bug_table section entries References: <87y4gkx04m.fsf@belgarion.home> <20150905203818.GO21084@n2100.arm.linux.org.uk> <87lhcjwjde.fsf@belgarion.home> <20150906194805.GP21084@n2100.arm.linux.org.uk> <87egibw7yh.fsf@belgarion.home> <20150906235414.GQ21084@n2100.arm.linux.org.uk> <877fo0x2ur.fsf@belgarion.home> <20150908200809.GC21084@n2100.arm.linux.org.uk> <87mvwvurae.fsf@belgarion.home> <87egi6umi2.fsf@belgarion.home> <20150910191652.GJ21084@n2100.arm.linux.org.uk> X-URL: http://belgarath.falguerolles.org/ Date: Thu, 10 Sep 2015 22:53:43 +0200 Message-ID: <8737ymuhbc.fsf@belgarion.home> User-Agent: Gnus/5.130008 (Ma Gnus v0.8) Emacs/24.4 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Russell King - ARM Linux writes: > I've been wondering whether we can teach GCC that set_domain modifies > the value that get_domain returns, rather than throwing a volatile > onto the asm in get_domain. The issue with a volatile there is that > even if the result is unused, but the code is reachable, gcc still has > to output the code to read the register. > > We might be able to get away with a memory clobber on the set_domain, > and fake a memory read in get_domain, eg, by passing > "m" (current_thread_info()->cpu_domain)) > to the get_domain asm. Ok, let's say we do it that way. I have some concerns about it: (a) I see an inbalance, as set_domain() doesn't actually modify current_thread_info()->cpu_domain. I don't see how it will protect use from this scenario : - get_domain() - set_domain() - set_domain() (b) domain.h is included from thread_info.h, not the other way around => current_thread_info() is not accessible from domain.h => that would require a bit of moving things around, as thread_info structure description should be available for example. This is currently my biggest problem with this approach. (c) I was also wondering if a case like this could happen : - a function foo() does a get_domain() => an exception/irq whatever happens and modifies the DACR - foo() continues a makes a modify_domain() => and here the modify_domain() uses the old DACR value Or said differently, I wonder if there is a case of 2 get_domain() calls in a row with a DACR modification in between. I What about something such as [1], without a memory clobber, but a "fake" memory variable link ? Cheers. -- Robert [1] get_domain() / set_domain() link diff --git a/arch/arm/include/asm/domain.h b/arch/arm/include/asm/domain.h index e878129f2fee..fc1d9c43aa08 100644 --- a/arch/arm/include/asm/domain.h +++ b/arch/arm/include/asm/domain.h @@ -83,13 +83,17 @@ #ifndef __ASSEMBLY__ +static int domain_barrier; +/* + * how to get the current stack pointer in C + */ static inline unsigned int get_domain(void) { unsigned int domain; asm( "mrc p15, 0, %0, c3, c0 @ get domain" - : "=r" (domain)); + : "=r" (domain), "=m" (domain_barrier)); return domain; } @@ -97,8 +101,8 @@ static inline unsigned int get_domain(void) static inline void set_domain(unsigned val) { asm volatile( - "mcr p15, 0, %0, c3, c0 @ set domain" - : : "r" (val)); + "mcr p15, 0, %1, c3, c0 @ set domain" + : "=m" (domain_barrier) : "r" (val)); isb(); }