From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Mark Brown <broonie@kernel.org>
Cc: Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
praneeth@ti.com, u-kumar1@ti.com, p-mantena@ti.com,
a-dutta@ti.com, s-k6@ti.com, linux-spi@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org
Subject: Re: [PATCH RFC 1/4] spi: spi-mem: Flag DQS capability
Date: Fri, 06 Feb 2026 09:27:34 +0100 [thread overview]
Message-ID: <874inuff9l.fsf@bootlin.com> (raw)
In-Reply-To: <9aaeca54-292a-42f7-90d6-a533ff1f5022@sirena.org.uk> (Mark Brown's message of "Thu, 5 Feb 2026 19:11:45 +0000")
On 05/02/2026 at 19:11:45 GMT, Mark Brown <broonie@kernel.org> wrote:
> On Thu, Feb 05, 2026 at 08:06:58PM +0100, Miquel Raynal wrote:
>> DQS is a typical SPI memory signal used to help with reading the data on
>> the bus at high speeds (especially in DTR mode) by avoiding clock
>> skews. The chip generates a clock signal synchronized with its data
>> output fronts, also called data strobe.
>
> Acked-by: Mark Brown <broonie@kernel.org>
>
> This seems fine if the rest of the series is fine; if people like this
> approach then it's probably sensible to merge along with the MTD patches
> using it and then send me a tag with the SPI bit for me to apply the
> SPI driver changes.
For sure. This is a prerequisite for Santhosh's SPI tuning series, so if
we go that way, I will merge that bit and offer an immutable tag with
the spi-mem and mtd patches as you proposed.
Thanks,
Miquèl
next prev parent reply other threads:[~2026-02-06 8:27 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-05 19:06 [PATCH RFC 0/4] mtd/spi-mem: Enable DQS support Miquel Raynal
2026-02-05 19:06 ` [PATCH RFC 1/4] spi: spi-mem: Flag DQS capability Miquel Raynal
2026-02-05 19:11 ` Mark Brown
2026-02-06 8:27 ` Miquel Raynal [this message]
2026-02-05 19:06 ` [PATCH RFC 2/4] mtd: spi-nand: Set the DQS spi-mem capability if available Miquel Raynal
2026-02-05 19:07 ` [PATCH RFC 3/4] mtd: spi-nand: winbond: Enable the DQS pin on W35N**JW series Miquel Raynal
2026-02-05 19:07 ` [PATCH DO NOT MERGE RFC 4/4] spi: cadence-qspi: Retrieve DQS capability using the core helper Miquel Raynal
2026-02-06 19:32 ` [PATCH RFC 0/4] mtd/spi-mem: Enable DQS support Santhosh Kumar K
2026-02-10 10:23 ` Miquel Raynal
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=874inuff9l.fsf@bootlin.com \
--to=miquel.raynal@bootlin.com \
--cc=a-dutta@ti.com \
--cc=broonie@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mtd@lists.infradead.org \
--cc=linux-spi@vger.kernel.org \
--cc=p-mantena@ti.com \
--cc=praneeth@ti.com \
--cc=richard@nod.at \
--cc=s-k6@ti.com \
--cc=thomas.petazzoni@bootlin.com \
--cc=u-kumar1@ti.com \
--cc=vigneshr@ti.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox