From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C7055267714 for ; Tue, 3 Feb 2026 15:58:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770134333; cv=none; b=kLYrr4y1uXgUuvDyw6Tk2pdqkr1Fvm87eya9eXs9vQA80FehH6TR3No3aYfmDOO+qDd42i3b2yPCBLBh7yAQiIVZRn8zagByCkndlXZ8agcT341awF1T1OBTw7nUuB2a9IYGmN8Aip98aTwPlreHTvUYexd/SxPE/J5x79ICpDY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770134333; c=relaxed/simple; bh=2t+iOBu1qL3o1+V+ofvma+8JenL4mCzkrRS352ATK1Q=; h=From:To:Cc:Subject:In-Reply-To:References:Date:Message-ID: MIME-Version:Content-Type; b=c3314Zbdb8Aq5vD41oIMAbVLvbfbhXwqHxeoWF2vQ1PdkqVyglAb08N6RvaYbpL0VG+9qWcfjNHEHJOt4kZ0pjmXxag3NLFleBHchs5/rUi5oAzID42jttJ3E6Xf29YhhYkIjdJYQXe9ZiaAUgqYZM0LXrUPTk0z+wsFWSr3eu0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=qGnNI4dw; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="qGnNI4dw" Received: by smtp.kernel.org (Postfix) with ESMTPSA id DEB2AC116D0; Tue, 3 Feb 2026 15:58:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1770134333; bh=2t+iOBu1qL3o1+V+ofvma+8JenL4mCzkrRS352ATK1Q=; h=From:To:Cc:Subject:In-Reply-To:References:Date:From; b=qGnNI4dwlw3oIfavt1FfjJDvaOtTmqNc6VRkanxU1Lx58MzaEjB3TRyfoMwZiKN9w 90K8EPrS7cdl1t2M6KjLhic/Yodl1o/iF1LY584cwlGhJp4SQ/lVvA2oCGA5X0jJHX 9Y4oRofbcti6m7fL+c5rf97FWm0G//L0BHF01I1cqalfhpbkiR6da9v0BZ8Aa36+/F hkmWHtGXRn2WEnGeUxMeGs8Uh1Sil3lC3CCZ0bwEBm2SxUxwlOKkkmxQKzSt662lCd uWHeJdnv4YHxBrxMY0tn57HEgJiQykuuW8I7gV2a3aUsvGVNTXRzeDIUFHRPX8gqTI Zwr22JbREkvWw== From: Thomas Gleixner To: Ricardo Neri , Tony Luck , Dave Hansen , "Rafael J. Wysocki" , Reinette Chatre , Dan Williams , Len Brown Cc: Andi Kleen , Stephane Eranian , "Ravi V. Shankar" , Ricardo Neri , linuxppc-dev@lists.ozlabs.org, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Alexander Graf Subject: Re: [PATCH v7 00/24] x86: Implement an HPET-based hardlockup detector In-Reply-To: <20230413035844.GA31620@ranerica-svr.sc.intel.com> References: <20230301234753.28582-1-ricardo.neri-calderon@linux.intel.com> <20230413035844.GA31620@ranerica-svr.sc.intel.com> Date: Tue, 03 Feb 2026 16:58:49 +0100 Message-ID: <874inx4y4m.ffs@tglx> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain On Wed, Apr 12 2023 at 20:58, Ricardo Neri wrote: > Hello, checking if there is any feedback on these patches that I plan to > send to the x86 maintainer. Seems this completely fell through the cracks. Alexander reinvented this recently with all mistakes made before, which made me come back to this. This needs to be respun against current mainline. Most rejects for the x86 preparatory patches are trivial, just the AMD IOMMU code has changed significantly. I haven't tried to apply the core watchdog stuff at all. I'll go through the x86/HPET side quickly and comment on what might need to be still address. Thanks, tglx