From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B89D83093AB for ; Thu, 29 Jan 2026 19:07:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769713639; cv=none; b=Qi9HdHHwxGpQkC7FkYMPis725nR+IjLWS1x6jyxRPBWF2/DNLYm7g2d9NROoPVjAqQimeHtV6LQahiMHlJ8KMxkM6XCo3zMcAzBTy3JEnbAAFK3xxXTYw9+L0WsJAXubRVrQYDvresLWsq6UuzE0H+qShCHElvyyzhtgsnSymGA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769713639; c=relaxed/simple; bh=NaICF++sQWnTSJAq0ARvd/noyTGHErQs08vhctlptIA=; h=From:To:Cc:Subject:In-Reply-To:References:Date:Message-ID: MIME-Version:Content-Type; b=AzFL5pPM+OpqRwx+WWhatG5nuN0Mc/YBx7ERg1WQ3OaZp6d2oS/XCh+fwUSukGUhZa8ApLmf6tAFNhM6a8oMGYMVHB7Yi/gYIzvg93zlffDFDJGqZj6w9H1UQwbxvjb2T+QAREpImeHI8DEYSHt5SYDW8X6R0mWK92QkCEwvm70= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=sRC1tpxS; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="sRC1tpxS" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 2B1CF4E42325; Thu, 29 Jan 2026 19:07:15 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id DB61960746; Thu, 29 Jan 2026 19:07:14 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id C1F4C119A880F; Thu, 29 Jan 2026 20:07:11 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1769713634; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=fcAwqBDdQkFXqd6/5h4Qc6cmwL5RaborgdhAPBGEaac=; b=sRC1tpxSzPdy6tXRzw4JHmqsNxVKuflNAaWaZRuSVqdrS093/DeT84hpfmsd7Xf2DlDsZP W19Q+tdHmO8AERGZRPBsVlKiUYdluQgU36B9EA917UnEjgJcxLJMg9+iZkCYe/yCuKTEWm DJcrDB0HUlwDkjvBAhz0SKyrLT0YQg7LaL+pleoTEtZx07cHviws3JodxVUUzJBA24ZsyC Iu2KqW81C1eE2FONADlUWUa1kWpz+XANkeCOz6WGsvg2rgnss+blGbn8QaHBWEVb/in80E tHjE2aujbhAKzLU6jNFr9FHC1v1RvojesmaBRSfvLlvEWMTueZTclYLiRaliJQ== From: Miquel Raynal To: Andrea Scian via B4 Relay Cc: Michal Simek , Richard Weinberger , Vignesh Raghavendra , andrea.scian@dave.eu, linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, Amit Kumar Subject: Re: [PATCH v2 1/2] mtd: rawnand: pl353: Fix software ECC support In-Reply-To: <20260126-pl353-soft-ecc-support-v2-1-fcd74b6e955f@dave.eu> (Andrea Scian via's message of "Mon, 26 Jan 2026 17:58:55 +0100") References: <20260126-pl353-soft-ecc-support-v2-0-fcd74b6e955f@dave.eu> <20260126-pl353-soft-ecc-support-v2-1-fcd74b6e955f@dave.eu> User-Agent: mu4e 1.12.7; emacs 30.2 Date: Thu, 29 Jan 2026 20:07:10 +0100 Message-ID: <874io4kzkx.fsf@bootlin.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Hello Andrea, On 26/01/2026 at 17:58:55 +01, Andrea Scian via B4 Relay wrote: > From: Andrea Scian > > We need to set another couple of fields in ecc structure to allow > choosing SW ECC instead of HW one, otherwise write operation fail. I'm not sure I captured in our previous exchanges that you were testing with SW ECC. > Signed-off-by: Andrea Scian > --- > drivers/mtd/nand/raw/pl35x-nand-controller.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/mtd/nand/raw/pl35x-nand-controller.c b/drivers/mtd/n= and/raw/pl35x-nand-controller.c > index 11bd90e3f18cb..fcb62b9ec947b 100644 > --- a/drivers/mtd/nand/raw/pl35x-nand-controller.c > +++ b/drivers/mtd/nand/raw/pl35x-nand-controller.c > @@ -976,6 +976,8 @@ static int pl35x_nand_attach_chip(struct nand_chip *c= hip) > fallthrough; > case NAND_ECC_ENGINE_TYPE_NONE: > case NAND_ECC_ENGINE_TYPE_SOFT: > + chip->ecc.algo =3D NAND_ECC_ALGO_HAMMING; This is unfortunately not relevant here. In software you can use whatever algorithm you want. It is writeable in DT and should not be hardcoded here. The only limit is the available OOB area for the strength (depending on the NAND geometry). > + chip->ecc.write_page_raw =3D nand_monolithic_write_page_raw; This, however, seems relevant and should be the oneliner! Please add Cc: stable & Fixes tags to your v3. Thanks, Miqu=C3=A8l