From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 930E133A03A; Thu, 22 Jan 2026 14:35:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769092553; cv=none; b=s249IQfDB6zSvSXF8OwlWByAb4J9FPV1MCw/kmxrhqJLjwfYKj4BYTLRM5iwKKmCYWI3ru/4wKm5ZwMC9NnzFXGs/fo2qXJ64yl8W6GzPn+3GXVeqjWIXonVeRl+Ku1weBg/CiQg6Kg4xHX6IZtR5by8/+8cWPiyPfcBUK1WWS4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769092553; c=relaxed/simple; bh=6JKagdpu1NW0MWhde9QrcjagRAxxNS3tGFdkj/BcMwc=; h=From:To:Cc:Subject:In-Reply-To:References:Date:Message-ID: MIME-Version:Content-Type; b=KjhU8AVwsyMbSD/jj4hXeD4lCzyRBjgHuj6UMSO9hq7SSyXwo8ob9o9EZSl/atPjBG8qylgcOw9BTWDsVBb8q4dBFFvb0NacoJf37eKG3Zc1NNwatL6sWshW9evDsoTozE3RN5b1BzNL44PmGzFiiszU8Ott16zncNcO/6nw7wA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=e9yOhMb/; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="e9yOhMb/" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 05F304E421F0; Thu, 22 Jan 2026 14:35:50 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id C2DE0606B6; Thu, 22 Jan 2026 14:35:49 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id B05FA119B828C; Thu, 22 Jan 2026 15:35:44 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1769092548; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=FMQ6v9PWs/W6+3N3+tONMG1XpsHmPJ52wzgsGbqmIs4=; b=e9yOhMb/V7CMe2+OK/aVHvBNkZ19aKgRlCFCK3B8oYkqO89HRlqzo3Bbw2X58ds2W4eCeP N6AXTv1lsHrNgv+yWnlw0Jg3oJVE5yhSMjZE9en5+iGDzTxQ8ILeMzhqezmdrf6ZQoOrPJ iXcCXmULKYoVhNBU+mJ9ZKb2e46Ol7GSYaMyemA3u5IC3oKimT81X3gFh16lBJn9biLF5u HDKHQu8d2bynyWD/P7JJT38btHyIsLDAIc0bHDSXdD8LMY9xd0RK2qdO7iva3I+0M/3uFu pE3UVdhSaaV4x1J0ElDa7GvRfl4cIrIDYZjZ8oNEFoIRVtibS3RaHvWimJqjVQ== From: Miquel Raynal To: Rob Herring Cc: Mark Brown , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Vaishnav Achath , Thomas Petazzoni , =?utf-8?Q?Herv=C3=A9?= Codina , Wolfram Sang , Vignesh Raghavendra , Santhosh Kumar K , Pratyush Yadav , Pascal Eberhard , linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org Subject: Re: [PATCH v3 03/17] spi: dt-bindings: cdns,qspi-nor: Add examples for testing the specific cases In-Reply-To: <20260121230759.GA223990-robh@kernel.org> (Rob Herring's message of "Wed, 21 Jan 2026 17:07:59 -0600") References: <20260121-schneider-6-19-rc1-qspi-v3-0-43e70fab4444@bootlin.com> <20260121-schneider-6-19-rc1-qspi-v3-3-43e70fab4444@bootlin.com> <20260121230759.GA223990-robh@kernel.org> User-Agent: mu4e 1.12.7; emacs 30.2 Date: Thu, 22 Jan 2026 15:35:44 +0100 Message-ID: <874iodpven.fsf@bootlin.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Hi Rob, On 21/01/2026 at 17:07:59 -06, Rob Herring wrote: > On Wed, Jan 21, 2026 at 06:04:59PM +0100, Miquel Raynal (Schneider Electr= ic) wrote: >> It is very painful to modify this file because the core IP described is >> so common, it has been implemented in many SoCs from different >> architectures. Both `dtbs_check` and `dt_binding_check` are rather long >> commands, even when restricted to a single schema files, and letting >> this file evolve without risking to break other DTSs is painful, because >> there are arm, arm64 and riscv platforms impacted and no way to check >> all of them at the same time. > > OTOH, examples aren't meant to be exhaustive test cases of all=20 > possibilities. If it was me, I'd actually just get rid of all the=20 > examples. They are generally just a copy from some .dts we already > have. I will align with this idea the day `make dtbs_check` (or something similarly simple) is exhaustive and cross platform :-) Maybe cdns,qspi-nor is an exception, but it impacts different architectures, which means the output of `make dtbs_check` is meaningless because it only covers a subset of the possible cases. Hence my attempt to gather all specific cases in the bindings, so I could run all the meaningful checks I wanted more easily. I think this patch has its usefulness, but I don't mind dropping it. >> + - | >> + #include >> + #include >> + #include >> + spi@13010000 { >> + compatible =3D "starfive,jh7110-qspi", "cdns,qspi-nor"; >> + reg =3D <0x13010000 0x10000>, <0x21000000 0x400000>; >> + interrupts =3D <25>; >> + clocks =3D <&syscrg JH7110_SYSCLK_QSPI_REF>, <&syscrg JH7110_SY= SCLK_QSPI_AHB>, >> + <&syscrg JH7110_SYSCLK_QSPI_APB>; >> + clock-names =3D "ref", "ahb", "apb"; >> + resets =3D <&syscrg JH7110_SYSRST_QSPI_APB>, <&syscrg JH7110_SY= SRST_QSPI_AHB>, >> + <&syscrg JH7110_SYSRST_QSPI_REF>; >> + reset-names =3D "qspi", "qspi-ocp", "rstc_ref"; >> + #address-cells =3D <1>; >> + #size-cells =3D <0>; >> + cdns,fifo-depth =3D <256>; >> + cdns,fifo-width =3D <4>; >> + cdns,trigger-address =3D <0x0>; >> + }; >> + >> + - | >> + #include >> + spi@2400 { >> + compatible =3D "amd,pensando-elba-qspi", "cdns,qspi-nor"; >> + reg =3D <0x2400 0x400>, <0x7fff0000 0x1000>; >> + interrupts =3D ; >> + clocks =3D <&flash_clk>; >> + #address-cells =3D <1>; >> + #size-cells =3D <0>; >> + cdns,fifo-depth =3D <1024>; >> + cdns,fifo-width =3D <4>; >> + cdns,trigger-address =3D <0x7fff0000>; > > This one really just looks like a subset of the others. The fifo-depth possibilities are extended just for this compatible. Basically I captured in the examples every specific case covered with an 'if' schema. Miqu=C3=A8l