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[91.219.240.17]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4324eab2c4fsm99649717f8f.42.2026.01.05.01.00.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Jan 2026 01:00:06 -0800 (PST) From: Vitaly Kuznetsov To: Michael Kelley , Mukesh Rathor , "linux-hyperv@vger.kernel.org" , "linux-kernel@vger.kernel.org" Cc: "kys@microsoft.com" , "haiyangz@microsoft.com" , "wei.liu@kernel.org" , "decui@microsoft.com" , "longli@microsoft.com" , "tglx@linutronix.de" , "mingo@redhat.com" , "bp@alien8.de" , "dave.hansen@linux.intel.com" , "x86@kernel.org" , "hpa@zytor.com" Subject: RE: [RFC][PATCH v0] x86/hyperv: Reserve 3 interrupt vectors used exclusively by mshv In-Reply-To: References: <20251231012100.681060-1-mrathor@linux.microsoft.com> <877bu0au1t.fsf@redhat.com> Date: Mon, 05 Jan 2026 10:00:05 +0100 Message-ID: <874ip0bfje.fsf@redhat.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain Michael Kelley writes: > From: Vitaly Kuznetsov Sent: Friday, January 2, 2026 7:55 AM >> >> Mukesh Rathor writes: >> >> > MSVC compiler used to compile the Microsoft Hyper-V hypervisor currently, >> > has an assert intrinsic that uses interrupt vector 0x29 to create an >> > exception. This will cause hypervisor to then crash and collect core. As >> > such, if this interrupt number is assigned to a device by linux and the >> > device generates it, hypervisor will crash. There are two other such >> > vectors hard coded in the hypervisor, 0x2C and 0x2D. >> > >> > Fortunately, the three vectors are part of the kernel driver space, and >> > that makes it feasible to reserve them early so they are not assigned >> > later. >> > >> > Signed-off-by: Mukesh Rathor >> > --- >> > arch/x86/kernel/cpu/mshyperv.c | 22 ++++++++++++++++++++++ >> > 1 file changed, 22 insertions(+) >> > >> > diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c >> > index 579fb2c64cfd..19d41f7434df 100644 >> > --- a/arch/x86/kernel/cpu/mshyperv.c >> > +++ b/arch/x86/kernel/cpu/mshyperv.c >> > @@ -478,6 +478,25 @@ int hv_get_hypervisor_version(union hv_hypervisor_version_info *info) >> > } >> > EXPORT_SYMBOL_GPL(hv_get_hypervisor_version); >> > >> > +/* >> > + * Reserve vectors hard coded in the hypervisor. If used outside, the hypervisor >> > + * will crash or hang or break into debugger. >> > + */ >> > +static void hv_reserve_irq_vectors(void) >> > +{ >> > + #define HYPERV_DBG_FASTFAIL_VECTOR 0x29 >> > + #define HYPERV_DBG_ASSERT_VECTOR 0x2C >> > + #define HYPERV_DBG_SERVICE_VECTOR 0x2D >> > + >> > + if (test_and_set_bit(HYPERV_DBG_ASSERT_VECTOR, system_vectors) || >> > + test_and_set_bit(HYPERV_DBG_SERVICE_VECTOR, system_vectors) || >> > + test_and_set_bit(HYPERV_DBG_FASTFAIL_VECTOR, system_vectors)) >> > + BUG(); >> >> Would it be less hackish to use sysvec_install() with a dummy handler >> for all three vectors instead? > > It would be, but unfortunately, it doesn't work. sysvec_install() requires > that the vector be >= FIRST_SYSTEM_VECTOR, and these vectors are not. > True; then maybe introduce a new API like sysvec_reserve() without the limitation? What I'm personally afraid of is that looking at sysvec_install() it already has an additional fred_install_sysvec() which operates over its own sysvec_table and only does idt_install_sysvec() when !cpu_feature_enabled(X86_FEATURE_FRED) -- and this patch just plays with system_vectors directly. Maybe this is even correct for now but I believe can be fragile in the future. Ultimately, I think it's up to x86 maintainers to say whether they think that playing with system_vectors outside of the core is OK and expected or if a new, explicit API is preferable. -- Vitaly