Re: [patch V2 3/8] x86/smp: Remove pointless wmb() from native_stop_other_cpus()

[Thomas Gleixner <tglx@linutronix.de>]

On Thu, Jun 15 2023 at 10:58, Peter Zijlstra wrote:

> On Tue, Jun 13, 2023 at 02:17:58PM +0200, Thomas Gleixner wrote:
>> The wmb() after the successfull atomic_cmpxchg() is complete voodoo along
>> with the comment stating "sync above data before sending IRQ".
>> 
>> There is no "above" data except for the atomic_t stopping_cpu which has
>> just been acquired. The reboot IPI handler does not check any data and
>> unconditionally disables the CPU.
>> 
>> Remove this cargo cult barrier.
>> 
>> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
>> Reviewed-by: Ashok Raj <ashok.raj@intel.com>
>> ---
>>  arch/x86/kernel/smp.c |    3 ---
>>  1 file changed, 3 deletions(-)
>> 
>> --- a/arch/x86/kernel/smp.c
>> +++ b/arch/x86/kernel/smp.c
>> @@ -174,9 +174,6 @@ static void native_stop_other_cpus(int w
>>  
>>  		atomic_set(&stop_cpus_count, num_online_cpus() - 1);
>>  
>> -		/* sync above data before sending IRQ */
>> -		wmb();
>> -
>>  		apic_send_IPI_allbutself(REBOOT_VECTOR);
>
> There's a second one a little below. That too should go.

Duh, yes.

> More to the point, the apic_send_*() functions should be the ones that
> ensure this if required etc.. See for example weak_wrmsr_fence() for
> x2apic.

Correct.