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From: Marc Zyngier <maz@kernel.org>
To: Yinbo Zhu <zhuyinbo@loongson.cn>
Cc: Huacai Chen <chenhuacai@kernel.org>,
	Jiaxun Yang <jiaxun.yang@flygoat.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1] irqchip: loongson-liointc: add hierarchy irq support
Date: Wed, 07 Dec 2022 08:08:04 +0000	[thread overview]
Message-ID: <874ju7tz4r.wl-maz@kernel.org> (raw)
In-Reply-To: <20221207014555.22465-1-zhuyinbo@loongson.cn>

On Wed, 07 Dec 2022 01:45:55 +0000,
Yinbo Zhu <zhuyinbo@loongson.cn> wrote:
> 
> When the irq of hierarchical interrupt chip was routed to liointc
> that asked liointc driver to support hierarchy irq and this patch
> was to add such support.
> 
> In addition, this patch only consider dts, and acpi hierarchy irq
> support will be added later as required.
> 
> Signed-off-by: Yinbo Zhu <zhuyinbo@loongson.cn>
> ---
>  drivers/irqchip/irq-loongson-liointc.c | 31 ++++++++++++++++++++++++++
>  1 file changed, 31 insertions(+)
> 
> diff --git a/drivers/irqchip/irq-loongson-liointc.c b/drivers/irqchip/irq-loongson-liointc.c
> index 0da8716f8f24..58e43a2cd02e 100644
> --- a/drivers/irqchip/irq-loongson-liointc.c
> +++ b/drivers/irqchip/irq-loongson-liointc.c
> @@ -177,6 +177,32 @@ static const struct irq_domain_ops acpi_irq_gc_ops = {
>  	.xlate	= liointc_domain_xlate,
>  };
>  
> +#ifdef	CONFIG_IRQ_DOMAIN_HIERARCHY
> +static int liointc_domain_alloc(struct irq_domain *domain, unsigned int virq,
> +				unsigned int nr_irqs, void *arg)
> +{
> +	int i, ret;
> +	irq_hw_number_t hwirq;
> +	unsigned int type = IRQ_TYPE_NONE;
> +	struct irq_fwspec *fwspec = arg;
> +
> +	ret = irq_domain_translate_twocell(domain, fwspec, &hwirq, &type);
> +	if (ret)
> +		return ret;
> +
> +	for (i = 0; i < nr_irqs; i++)
> +		irq_map_generic_chip(domain, virq + i, hwirq + i);
> +
> +	return 0;
> +}
> +
> +static const struct irq_domain_ops of_irq_gc_ops = {
> +	.translate	= irq_domain_translate_twocell,
> +	.alloc		= liointc_domain_alloc,
> +	.free		= irq_domain_free_irqs_top,
> +};
> +#endif
> +
>  static int liointc_init(phys_addr_t addr, unsigned long size, int revision,
>  		struct fwnode_handle *domain_handle, struct device_node *node)
>  {
> @@ -218,8 +244,13 @@ static int liointc_init(phys_addr_t addr, unsigned long size, int revision,
>  		domain = irq_domain_create_linear(domain_handle, LIOINTC_CHIP_IRQ,
>  					&acpi_irq_gc_ops, priv);
>  	else
> +#ifdef	CONFIG_IRQ_DOMAIN_HIERARCHY
> +		domain = irq_domain_create_linear(domain_handle, LIOINTC_CHIP_IRQ,
> +					&of_irq_gc_ops, priv);
> +#else
>  		domain = irq_domain_create_linear(domain_handle, LIOINTC_CHIP_IRQ,
>  					&irq_generic_chip_ops, priv);
> +#endif

Two things:

- Why do we need three calls to create the same domains depending on
  what firmware is used and kernel configuration?

- who is going to decide whether to select the
  CONFIG_IRQ_DOMAIN_HIERARCHY option?

I'd really like to see a statement from the Loongson folks about what
this whole DT stuff is all about. AFAICT, the core ACPICA stuff isn't
even fully merged (i.e. we still rely on arch-specific hacks).

Can you *please* finish what you've started before adding another
layer of quality stuff on top?

	M.

-- 
Without deviation from the norm, progress is not possible.

  reply	other threads:[~2022-12-07  8:09 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-07  1:45 [PATCH v1] irqchip: loongson-liointc: add hierarchy irq support Yinbo Zhu
2022-12-07  8:08 ` Marc Zyngier [this message]
2022-12-07 10:50   ` Yinbo Zhu
2022-12-07 11:07     ` Marc Zyngier
2022-12-09  2:18       ` Yinbo Zhu

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