From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5B8A1C001B0 for ; Sat, 12 Aug 2023 16:47:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229937AbjHLQrE (ORCPT ); Sat, 12 Aug 2023 12:47:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45174 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229454AbjHLQrD (ORCPT ); Sat, 12 Aug 2023 12:47:03 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5D98C10CE for ; Sat, 12 Aug 2023 09:47:06 -0700 (PDT) From: Thomas Gleixner DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1691858824; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=nspaD/uAmIWqNM731GIkjfMBXb2W0vpGEj8uGwGUdNk=; b=dAspbu7fkTiZy8mkk/hQcMLLijsuSeLlS24Ofa0FMqsosQ35Fm4qm4PLk+tmHEvfGUUGtj qRNvynvADnaijxuBe5oKITazfMhLI6XXZVp190kOzBSnHVCGg/qxs/MAUVG0LG3xQ0E09z 99yWSinRHDq2Oekb2Z56bqCBy/ZM+KtcCEgpkkTAEeYU1x40vO6/yowYCxCsGhUZ6IcM/Q 2h2du/mQTK02wFvx/fio5+qoLHVY0xMKUW78nL4xEoWFusQQaaddWenXKYd89R/kc+gHNZ M15Mt5lIr8TC+AjcehKpB1/Xfce11HAkT7xlWGiNoywB4VTqfL6hBHJDzYby/w== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1691858824; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=nspaD/uAmIWqNM731GIkjfMBXb2W0vpGEj8uGwGUdNk=; b=enuHe9Nkm8guDvrG8wABmkDODNY49y7A5XRqEhEZ8r54ovyk5pQ1NX1aNHgNbgE6UG4fGP dNzyjQRmwiCtwJDA== To: Peter Zijlstra Cc: LKML , x86@kernel.org, Borislav Petkov , Ashok Raj , Arjan van de Ven Subject: Re: [patch 28/30] x86/microcode: Handle "offline" CPUs correctly In-Reply-To: <874jl5j4y2.ffs@tglx> References: <20230810153317.850017756@linutronix.de> <20230810160806.562016788@linutronix.de> <20230810204605.GF212435@hirez.programming.kicks-ass.net> <874jl5j4y2.ffs@tglx> Date: Sat, 12 Aug 2023 18:47:03 +0200 Message-ID: <875y5kgqd4.ffs@tglx> MIME-Version: 1.0 Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Aug 11 2023 at 11:36, Thomas Gleixner wrote: > On Thu, Aug 10 2023 at 22:46, Peter Zijlstra wrote: > OTOH, it's not really required. Right now we mandate that _all_ present > cores have at least one sibling online. For simplicity (and practical > reasons - think "nosmt") we require the "primary" thread to be online. > > Microcode is strict per core, no matter how many threads are there. We > would not need any of this mess if Intel would have synchronized the > threads on microcode update like AMD does. This is coming with future > CPUs which advertise "uniform" update with a scope ranging from core, > package to systemwide. Which still requires the "offline" CPU treatment as the siblings are not allowed to sit in MWAIT or HLT. So this whole NMI exercise is bound to stay. Thanks, tglx