From: Thomas Gleixner <tglx@linutronix.de>
To: "Maciej W. Rozycki" <macro@orcam.me.uk>
Cc: Daniel Vacek <neelx@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
x86@kernel.org, open list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] x86/apic: Clarify i82489DX bit overlap in APIC_LVT0
Date: Wed, 13 Apr 2022 15:24:07 +0200 [thread overview]
Message-ID: <875yndf760.ffs@tglx> (raw)
In-Reply-To: <alpine.DEB.2.21.2204122235140.9383@angie.orcam.me.uk>
Maciej,
On Tue, Apr 12 2022 at 23:17, Maciej W. Rozycki wrote:
> On Tue, 12 Apr 2022, Thomas Gleixner wrote:
>
>> Daniel stumbled over the undocumented bit overlap of the i82498DX external
>> APIC and the TSC deadline timer configuration bit in modern APICs.
>
> For the record, it's documented in the i82498DX datasheet[1] and user
> manual[2]:
>
> 'Bits [19:18] Timer Base: This field selects the time base input to be
> used by the timer.
That's true, but how many people aside of you and me still have access
to the i82498DX related documentation? The interwebs has no trace of
them.
With the above I explicitely meant the undocumented bit overlap both in
the current SDMs and the kernel source.
Thanks,
tglx
next prev parent reply other threads:[~2022-04-13 13:24 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-02 14:02 [PATCH] [RFC] apic: fix timer base macro definitions Daniel Vacek
2022-04-06 11:47 ` Thomas Gleixner
2022-04-06 14:54 ` Daniel Vacek
2022-04-12 20:34 ` [PATCH] x86/apic: Clarify i82489DX bit overlap in APIC_LVT0 Thomas Gleixner
2022-04-12 22:17 ` Maciej W. Rozycki
2022-04-13 13:24 ` Thomas Gleixner [this message]
2022-04-13 15:55 ` Maciej W. Rozycki
2022-04-13 16:44 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
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