From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4E07AC433EF for ; Wed, 27 Oct 2021 12:20:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 34A706109E for ; Wed, 27 Oct 2021 12:20:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241829AbhJ0MW6 (ORCPT ); Wed, 27 Oct 2021 08:22:58 -0400 Received: from mail.kernel.org ([198.145.29.99]:40360 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230420AbhJ0MW5 (ORCPT ); Wed, 27 Oct 2021 08:22:57 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id CCD616103C; Wed, 27 Oct 2021 12:20:31 +0000 (UTC) Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1mfhuv-001uBC-Hv; Wed, 27 Oct 2021 13:20:29 +0100 Date: Wed, 27 Oct 2021 13:20:23 +0100 Message-ID: <875ytibqwo.wl-maz@kernel.org> From: Marc Zyngier To: Mark Rutland Cc: Nicolas Saenz Julienne , catalin.marinas@arm.com, will@kernel.org, tglx@linutronix.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] arm64: Select POSIX_CPU_TIMERS_TASK_WORK In-Reply-To: <20211027112658.GA54628@C02TD0UTHF1T.local> References: <20211018144713.873464-1-nsaenzju@redhat.com> <20211027112658.GA54628@C02TD0UTHF1T.local> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: mark.rutland@arm.com, nsaenzju@redhat.com, catalin.marinas@arm.com, will@kernel.org, tglx@linutronix.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 27 Oct 2021 12:26:58 +0100, Mark Rutland wrote: > > [adding Marc Z to Cc, since this affects KVM] > > On Mon, Oct 18, 2021 at 04:47:13PM +0200, Nicolas Saenz Julienne wrote: > > With 6caa5812e2d1 ("KVM: arm64: Use generic KVM xfer to guest work > > function") all arm64 exit paths are properly equipped to handle the > > POSIX timers' task work. > > > > Deferring timer callbacks to thread context, not only limits the amount > > of time spent in hard interrupt context, but is a safer > > implementation[1], and will allow PREEMPT_RT setups to use KVM[2]. > > > > So let's enable POSIX_CPU_TIMERS_TASK_WORK on arm64. > > > > [1] https://lore.kernel.org/all/20200716201923.228696399@linutronix.de/ > > [2] https://www.spinics.net/lists/linux-rt-users/msg24860.html > > Trivial nit: could we please make that second link: > > https://lore.kernel.org/linux-rt-users/87v92bdnlx.ffs@tglx/ > > > Signed-off-by: Nicolas Saenz Julienne > > Regardless, this makes sense to me, and given you've tested it: > > Acked-by: Mark Rutland > > Thanks, > Mark. > > > > > --- > > > > This was tested by running all relevant kernel timer self-tests and > > making sure KVM still works as expected. > > > > arch/arm64/Kconfig | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig > > index 789036cf74f5..ce0d0d254542 100644 > > --- a/arch/arm64/Kconfig > > +++ b/arch/arm64/Kconfig > > @@ -191,6 +191,7 @@ config ARM64 > > select HAVE_PERF_REGS > > select HAVE_PERF_USER_STACK_DUMP > > select HAVE_REGS_AND_STACK_ACCESS_API > > + select HAVE_POSIX_CPU_TIMERS_TASK_WORK > > select HAVE_FUNCTION_ARG_ACCESS_API > > select HAVE_FUTEX_CMPXCHG if FUTEX > > select MMU_GATHER_RCU_TABLE_FREE Looks reasonable to me. Acked-by: Marc Zyngier M. -- Without deviation from the norm, progress is not possible.