Re: [PATCH v3 8/8] ASoC: cs42l42: Wait for debounce interval after resume

Pierre-Louis Bossart
2023-01-30T16:46:09Z

On 1/27/23 10:51, Stefan Binding wrote:
> Since clock stop causes bus reset on Intel controllers, we need

nit-pick: It's more that the Intel controller has a power optimization
where the context is lost when stopping the clock, which requires a bus
reset and full re-enumeration/initialization when the clock resumes.

The rest of the patch is fine so

Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>

> to wait for the debounce interval on resume, to ensure all the
> interrupt status registers are set correctly.
>
> Signed-off-by: Stefan Binding <sbinding@opensource.cirrus.com>