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From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Santhosh Kumar K <s-k6@ti.com>
Cc: Michael Walle <mwalle@kernel.org>,  <broonie@kernel.org>,
	<robh@kernel.org>,  <krzk+dt@kernel.org>,  <conor+dt@kernel.org>,
	<richard@nod.at>,  <vigneshr@ti.com>,  <tudor.ambarus@linaro.org>,
	<pratyush@kernel.org>,  <linux-spi@vger.kernel.org>,
	<devicetree@vger.kernel.org>,  <linux-kernel@vger.kernel.org>,
	<linux-mtd@lists.infradead.org>,  <praneeth@ti.com>,
	 <u-kumar1@ti.com>, <p-mantena@ti.com>,  <a-dutta@ti.com>
Subject: Re: [RFC PATCH v2 09/12] spi: cadence-quadspi: add PHY tuning infrastructure
Date: Thu, 19 Feb 2026 11:34:46 +0100	[thread overview]
Message-ID: <877bs9t41l.fsf@bootlin.com> (raw)
In-Reply-To: <54964ad3-64d7-4f4e-bcf9-f0b92b1df034@ti.com> (Santhosh Kumar K.'s message of "Wed, 18 Feb 2026 23:37:00 +0530")

On 18/02/2026 at 23:37:00 +0530, Santhosh Kumar K <s-k6@ti.com> wrote:

> Hello Michael and Miquel,
>
> On 12/02/26 18:25, Miquel Raynal wrote:
>> Hello,
>> 
>>>>>> +	for_each_child_of_node(partition_np, part_np) {
>>>>>> +		if (of_property_read_string(part_np, "label", &label) ||
>>>>>> +		    !strstr(label, "phypattern"))
>>>>>> +			continue;
>>>>>
>>>>> There was already a review comment on the last version. Moving this
>>>>> into the driver doesn't make it any better. In fact this might
>>>>> create a (bad) precedent for future drivers.
>>>>
>>>> I remember complaining about it but not if there was a solution
>>>> foreseen. In SPI NAND the solution has been found: the pattern is in the
>>>> driver and we load it into cache before PHY tuning. But for SPI NOR I
>>>> understood this wasn't possible. What would be an alternative?
>>>
>>> I'm not complaining about using a partition for the pattern but
>>> about the hardcoded name of it.
>>>
>>> It was proposed to use at least a device tree phandle to point to a
>>> partition (or so).
>> Ah, yes indeed, thanks for clarifying this up (again) for me. I also
>> agree the hardcoded name is not ideal.
>
> I remember this was discussed in the previous version. As mentioned
> in v1, using a phandle may not be ideal since a single controller can
> be associated with multiple flashes. Regarding the suggestion to
> maintain an array of phandles - consider a configuration with three
> flashes (NAND, NOR, and another NAND). In such a case, we would not
> need a phandle for the NAND devices, right?

We could have a per-chip phy-tuning-data phandle?

> Also, I'm trying to understand the practical difference between using
> the partition name versus a phandle. Since the phandle would still be
> named something like "phy_partition", it seems functionally similar.
> Please let me know if I'm missing something here.

Functionally, yes, but conceptually I'd say it looks cleaner (and
somewhat a bit faster when there are many partitions).

Thanks,
Miquèl

  parent reply	other threads:[~2026-02-19 10:34 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-13 14:16 [RFC PATCH v2 00/12] spi: cadence-quadspi: add PHY tuning support Santhosh Kumar K
2026-01-13 14:16 ` [RFC PATCH v2 01/12] spi: dt-bindings: add spi-has-dqs property Santhosh Kumar K
2026-02-04 10:46   ` Miquel Raynal
2026-02-05 17:46     ` Santhosh Kumar K
2026-02-05 18:06       ` Miquel Raynal
2026-01-13 14:16 ` [RFC PATCH v2 02/12] spi: spi-mem: add controller tuning support Santhosh Kumar K
2026-01-13 14:16 ` [RFC PATCH v2 03/12] mtd: spinand: perform controller tuning during probe Santhosh Kumar K
2026-02-05 17:35   ` Miquel Raynal
2026-02-06 19:23     ` Santhosh Kumar K
2026-01-13 14:16 ` [RFC PATCH v2 04/12] mtd: spi-nor: extract read operation setup into helper Santhosh Kumar K
2026-01-13 14:16 ` [RFC PATCH v2 05/12] mtd: spi-nor: perform controller tuning during probe Santhosh Kumar K
2026-01-13 14:16 ` [RFC PATCH v2 06/12] spi: cadence-quadspi: move cqspi_readdata_capture earlier Santhosh Kumar K
2026-02-05 17:35   ` Miquel Raynal
2026-01-13 14:16 ` [RFC PATCH v2 07/12] spi: cadence-quadspi: add DQS support to read data capture Santhosh Kumar K
2026-02-05 17:35   ` Miquel Raynal
2026-01-13 14:16 ` [RFC PATCH v2 08/12] spi: cadence-quadspi: read 'has-dqs' DT property Santhosh Kumar K
2026-02-05 17:35   ` Miquel Raynal
2026-02-19 12:14     ` Michael Walle
2026-02-20  8:21       ` Miquel Raynal
2026-01-13 14:16 ` [RFC PATCH v2 09/12] spi: cadence-quadspi: add PHY tuning infrastructure Santhosh Kumar K
2026-02-05 17:39   ` Miquel Raynal
2026-02-06 19:25     ` Santhosh Kumar K
2026-02-13  8:18       ` Miquel Raynal
2026-02-18 18:07         ` Santhosh Kumar K
2026-02-19 10:30           ` Miquel Raynal
2026-02-09  9:48   ` Michael Walle
2026-02-12 10:50     ` Miquel Raynal
2026-02-12 11:14       ` Michael Walle
2026-02-12 12:55         ` Miquel Raynal
2026-02-18 18:07           ` Santhosh Kumar K
2026-02-19  8:33             ` Michael Walle
2026-02-19 10:34             ` Miquel Raynal [this message]
2026-01-13 14:16 ` [RFC PATCH v2 10/12] spi: cadence-quadspi: implement PHY tuning algorithm Santhosh Kumar K
2026-02-05 17:42   ` Miquel Raynal
2026-01-13 14:16 ` [RFC PATCH v2 11/12] spi: cadence-quadspi: restrict PHY frequency to tuned operations Santhosh Kumar K
2026-02-05 17:47   ` Miquel Raynal
2026-02-06 19:27     ` Santhosh Kumar K
2026-02-13  8:21       ` Miquel Raynal
2026-03-17 15:17         ` Miquel Raynal
2026-01-13 14:16 ` [RFC PATCH v2 12/12] spi: cadence-quadspi: enable PHY for direct reads and writes Santhosh Kumar K
2026-02-05 17:51   ` Miquel Raynal
2026-02-04 10:29 ` [RFC PATCH v2 00/12] spi: cadence-quadspi: add PHY tuning support Miquel Raynal
2026-02-05 15:48   ` Miquel Raynal
2026-02-06 19:28     ` Santhosh Kumar K
2026-02-13  9:01       ` Miquel Raynal
2026-02-18 18:08         ` Santhosh Kumar K

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