From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 337D4C43334 for ; Tue, 28 Jun 2022 08:25:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244415AbiF1IZg (ORCPT ); Tue, 28 Jun 2022 04:25:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49084 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233980AbiF1IZb (ORCPT ); Tue, 28 Jun 2022 04:25:31 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 04B3D10B3 for ; Tue, 28 Jun 2022 01:25:31 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id B5FCFB81C0F for ; Tue, 28 Jun 2022 08:25:29 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5DCEDC3411D; Tue, 28 Jun 2022 08:25:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1656404728; bh=Pc/cN4VghSzEUqrH/E4GTfuBQ0DAYDi3kn6G0MD6Ug8=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=e3wx484dWka3SbjMArLpiQFs20z0cOkYMBnt7Pei2yr/NMj2K6AOIr5OLuxSQIHrj /yMnjV42eVLlumv9UfS3xVvxHQg2c0G+3mBN4L1YEFUmdGDq41glZ+qioI2H60diuR 31mfnWPP94t3hi+bxRatBL7yQYMQP6qQH7I8amBJ8+xngNeAjzO7g/YAd2aTVKm1yl RjT+5YMPkRcyPx7bQVnO24IhjWAvH6iTVRc0EE7k2MtOjum4JuG0cyf6MOyJ9oKoMk sW7NouW9wDOgxB7jFF9+4RscHWz76nbPii76hEclAAgaM2xv0Rp2N+EK89D7JflJYz ae4qLGvAamYwg== Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1o66XG-003i7y-3A; Tue, 28 Jun 2022 09:25:26 +0100 Date: Tue, 28 Jun 2022 09:25:25 +0100 Message-ID: <877d512o0a.wl-maz@kernel.org> From: Marc Zyngier To: Stafford Horne Cc: LKML , Openrisc , Jonas Bonn , Stefan Kristiansson , Thomas Gleixner Subject: Re: [PATCH] irqchip: or1k-pic: Undefine mask_ack for level triggered hardware In-Reply-To: <20220628012854.681220-1-shorne@gmail.com> References: <20220628012854.681220-1-shorne@gmail.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: shorne@gmail.com, linux-kernel@vger.kernel.org, openrisc@lists.librecores.org, jonas@southpole.se, stefan.kristiansson@saunalahti.fi, tglx@linutronix.de X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 28 Jun 2022 02:28:54 +0100, Stafford Horne wrote: > > The mask_ack operation clears the interrupt by writing to the PICSR > register. This we don't want for level triggered interrupt because > it does not actually clear the interrupt on the source hardware. > > This was causing issues in qemu with multi core setups where > interrupts would continue to fire even though they had been cleared in > PICSR. > > Just remove the mask_ack operation. > > Signed-off-by: Stafford Horne > --- > Note, > > I currently have this queued with openrisc fixes for 5.19-rcX. If this is ok > with the IRQ maintainers I would like to have this merged via the OpenRISC > queue. > > drivers/irqchip/irq-or1k-pic.c | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/drivers/irqchip/irq-or1k-pic.c b/drivers/irqchip/irq-or1k-pic.c > index 49b47e787644..f289ccd95291 100644 > --- a/drivers/irqchip/irq-or1k-pic.c > +++ b/drivers/irqchip/irq-or1k-pic.c > @@ -66,7 +66,6 @@ static struct or1k_pic_dev or1k_pic_level = { > .name = "or1k-PIC-level", > .irq_unmask = or1k_pic_unmask, > .irq_mask = or1k_pic_mask, > - .irq_mask_ack = or1k_pic_mask_ack, > }, > .handle = handle_level_irq, > .flags = IRQ_LEVEL | IRQ_NOPROBE, Acked-by: Marc Zyngier Feel free to take this via your tree. M. -- Without deviation from the norm, progress is not possible.