From: Michael Ellerman <mpe@ellerman.id.au>
To: Christophe Leroy <christophe.leroy@c-s.fr>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Paul Mackerras <paulus@samba.org>,
segher@kernel.crashing.org
Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH v4 2/2] powerpc/irq: inline call_do_irq() and call_do_softirq()
Date: Thu, 21 Nov 2019 17:14:45 +1100 [thread overview]
Message-ID: <877e3tbvsa.fsf@mpe.ellerman.id.au> (raw)
In-Reply-To: <5ca6639b7c1c21ee4b4138b7cfb31d6245c4195c.1570684298.git.christophe.leroy@c-s.fr>
Christophe Leroy <christophe.leroy@c-s.fr> writes:
> call_do_irq() and call_do_softirq() are quite similar on PPC32 and
> PPC64 and are simple enough to be worth inlining.
>
> Inlining them avoids an mflr/mtlr pair plus a save/reload on stack.
>
> This is inspired from S390 arch. Several other arches do more or
> less the same. The way sparc arch does seems odd thought.
>
> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
> Reviewed-by: Segher Boessenkool <segher@kernel.crashing.org>
>
> ---
> v2: no change.
> v3: no change.
> v4:
> - comment reminding the purpose of the inline asm block.
> - added r2 as clobbered reg
That breaks 64-bit with GCC9:
arch/powerpc/kernel/irq.c: In function 'do_IRQ':
arch/powerpc/kernel/irq.c:650:2: error: PIC register clobbered by 'r2' in 'asm'
650 | asm volatile(
| ^~~
arch/powerpc/kernel/irq.c: In function 'do_softirq_own_stack':
arch/powerpc/kernel/irq.c:711:2: error: PIC register clobbered by 'r2' in 'asm'
711 | asm volatile(
| ^~~
> diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
> index 04204be49577..d62fe18405a0 100644
> --- a/arch/powerpc/kernel/irq.c
> +++ b/arch/powerpc/kernel/irq.c
> @@ -642,6 +642,22 @@ void __do_irq(struct pt_regs *regs)
> irq_exit();
> }
>
> +static inline void call_do_irq(struct pt_regs *regs, void *sp)
> +{
> + register unsigned long r3 asm("r3") = (unsigned long)regs;
> +
> + /* Temporarily switch r1 to sp, call __do_irq() then restore r1 */
> + asm volatile(
> + " "PPC_STLU" 1, %2(%1);\n"
> + " mr 1, %1;\n"
> + " bl %3;\n"
> + " "PPC_LL" 1, 0(1);\n" :
> + "+r"(r3) :
> + "b"(sp), "i"(THREAD_SIZE - STACK_FRAME_OVERHEAD), "i"(__do_irq) :
> + "lr", "xer", "ctr", "memory", "cr0", "cr1", "cr5", "cr6", "cr7",
> + "r0", "r2", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12");
> +}
If we add a nop after the bl, so the linker could insert a TOC restore,
then I don't think there's any circumstance under which we expect this
to actually clobber r2, is there?
cheers
next prev parent reply other threads:[~2019-11-21 6:14 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-10 5:36 [PATCH v4 1/2] powerpc/irq: bring back ksp_limit management in C functions Christophe Leroy
2019-10-10 5:36 ` [PATCH v4 2/2] powerpc/irq: inline call_do_irq() and call_do_softirq() Christophe Leroy
2019-11-21 6:14 ` Michael Ellerman [this message]
2019-11-21 10:15 ` Segher Boessenkool
2019-11-25 10:32 ` Michael Ellerman
2019-11-25 14:25 ` Segher Boessenkool
2019-11-27 13:50 ` Christophe Leroy
2019-11-27 14:59 ` Segher Boessenkool
2019-11-27 15:15 ` Christophe Leroy
2019-11-29 18:46 ` Segher Boessenkool
2019-12-04 4:32 ` Christophe Leroy
2019-12-06 20:59 ` Segher Boessenkool
2019-12-07 9:42 ` Christophe Leroy
2019-12-07 17:40 ` Segher Boessenkool
2019-12-09 10:53 ` Michael Ellerman
2019-12-19 6:57 ` Christophe Leroy
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