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To: Yu Zhao <yu.zhao@intel.com>
Cc: jbarnes@virtuousgeek.org, linux-pci@vger.kernel.org, kvm@vger.kernel.org,
       linux-kernel@vger.kernel.org
Subject: Re: [PATCH v8 1/7] PCI: initialize and release SR-IOV capability
From: Andi Kleen <andi@firstfloor.org>
References: <1234256355-23153-1-git-send-email-yu.zhao@intel.com>
	<1234256355-23153-2-git-send-email-yu.zhao@intel.com>
Date: Fri, 13 Feb 2009 17:56:44 +0100
In-Reply-To: <1234256355-23153-2-git-send-email-yu.zhao@intel.com> (Yu Zhao's message of "Tue, 10 Feb 2009 16:59:09 +0800")
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Yu Zhao <yu.zhao@intel.com> writes:
> +
> +
> +static int sriov_init(struct pci_dev *dev, int pos)
> +{
> +	int i;
> +	int rc;
> +	int nres;
> +	u32 pgsz;
> +	u16 ctrl, total, offset, stride;
> +	struct pci_sriov *iov;
> +	struct resource *res;
> +	struct pci_dev *pdev;
> +
> +	if (dev->pcie_type != PCI_EXP_TYPE_RC_END &&
> +	    dev->pcie_type != PCI_EXP_TYPE_ENDPOINT)
> +		return -ENODEV;
> +

It would be a good idea to put a might_sleep() here just in 
case the msleep happens below and drivers call it incorrectly.

> +	pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
> +	if (ctrl & PCI_SRIOV_CTRL_VFE) {
> +		pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0);
> +		msleep(100);


That's really long. Hopefully that's really needed.

> +
> +	pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
> +	pci_write_config_word(dev, pos + PCI_SRIOV_NUM_VF, total);
> +	pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);
> +	pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);
> +	if (!offset || (total > 1 && !stride))
> +		return -EIO;
> +
> +	pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz);
> +	i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0;
> +	pgsz &= ~((1 << i) - 1);
> +	if (!pgsz)
> +		return -EIO;

All the error paths don't seem to undo the config space writes.
How will the devices behave with half initialized context?

-Andi

-- 
ak@linux.intel.com -- Speaking for myself only.