From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4DF474963DA for ; Thu, 2 Jul 2026 09:49:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782985778; cv=none; b=SwOgEcZI6AUbseo5gxQko0N7skfWOU/yAU/DtroyKnDctJXCnfjVVaLjz6pPRZYh55mqfyirVIjGooWEiK4F/JTQcfsY1AsX7S/5tnMkbziob+Jp2Xn0f0fHdTh74kiK1hFzslbb6/NxHtoq/YBPeeflx9X6NqZ9CFtzZfgQeNU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782985778; c=relaxed/simple; bh=kYwiwPZDNXRjYdVXG99p6rYoYeRKzgBMXbWC0gZC+A0=; h=From:To:Cc:Subject:In-Reply-To:References:Date:Message-ID: MIME-Version:Content-Type; b=nVeohOA+EhdguzRyzTgnBpTUs1e8BFreAzCTz7kVboE4R5OqLEPDVvt0TvnV9tsItJlAhxrBfNoODLKEyRiMuVnYHi3ixr4dAi9PzumIsytPOV9j6NXI9C/D0zlHA+RkzT5SGau6Vb9zKwtmAl5IJ+sveOXffmH+wJTMWeeqRqM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=Y+LDImkw; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=KKwisRQI; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="Y+LDImkw"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="KKwisRQI" From: Nam Cao DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1782985775; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=kYwiwPZDNXRjYdVXG99p6rYoYeRKzgBMXbWC0gZC+A0=; b=Y+LDImkwgJjJsnYXOdIw0K1O89I4kBOB1UH5OOMgVnN0/5BcEVcoFRDhQL0I9zjk/v4qYo his/BNL+bFtOP+kddmYc3xz4fWgEAbw72wRXqIsxIBgFTX19Sx0sZwYuOyViwH1Qhr/BBm 9s+lWGhVulCU8LP2ZkV+awdszp3OUmDGla1n2qA0Dc6egLHlnNY/RJl0tHvu0lMM0g9ciy 7d3RjdfrezwlqUUG2aA42ROZbmZqfs89vFBG4MqLf4sja8jv5OgjNIAxQ14lOSonhhcCge 6liyQiNvYUf0vN+hykhRJmU2YuLVFLnbVfUmHECTxlcKcXvhgyLc4yLhta1O1A== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1782985775; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=kYwiwPZDNXRjYdVXG99p6rYoYeRKzgBMXbWC0gZC+A0=; b=KKwisRQIC4m6dzRC5atozHcxZ7AMOjJAmQGCNmoO7xsbf/Pj+6DArfCLYkaNDmeCiVXSnf P9bc6hVKDG+0ncBw== To: Xiaofeng Yuan , Paul Walmsley , Palmer Dabbelt , Albert Ou Cc: Charlie Jenkins , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, xiaofengmian@163.com Subject: Re: [PATCH v6 1/2] riscv: probes: simulate c.jal instruction In-Reply-To: <20260701081033.49871-2-xiaofengmian@163.com> References: <20260701081033.49871-1-xiaofengmian@163.com> <20260701081033.49871-2-xiaofengmian@163.com> Date: Thu, 02 Jul 2026 11:49:34 +0200 Message-ID: <878q7tu3f5.fsf@yellow.woof> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain Xiaofeng Yuan writes: > The c.jal instruction is currently marked REJECTED in kprobes > instruction decoding, but it should be SIMULATED like other > compressed jump instructions. > > Add simulate_c_jal() which saves the return address to RA and > sets the program counter to the target offset, reusing > simulate_c_j for the common jump logic. > > Although c.jal is RV32-only, the function compiles unconditionally. > On RV64, riscv_insn_is_c_jal() always returns 0, so the simulation > code is never invoked and the small overhead in kernel size is > acceptable. > > Signed-off-by: Xiaofeng Yuan Reviewed-by: Nam Cao Tested-by: Nam Cao