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From: Thomas Gleixner <tglx@kernel.org>
To: Biju <biju.das.au@gmail.com>
Cc: Biju Das <biju.das.jz@bp.renesas.com>,
	linux-kernel@vger.kernel.org,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>,
	Biju Das <biju.das.au@gmail.com>,
	linux-renesas-soc@vger.kernel.org
Subject: Re: [PATCH v3 4/9] irqchip/renesas-rzg2l: Drop IRQC_NUM_IRQ macro
Date: Fri, 06 Feb 2026 12:50:12 +0100	[thread overview]
Message-ID: <878qd6147f.ffs@tglx> (raw)
In-Reply-To: <20260206111658.231934-5-biju.das.jz@bp.renesas.com>

On Fri, Feb 06 2026 at 11:16, Biju wrote:
> +/**
> + * struct rzg2l_hw_info - Interrupt Control Unit controller hardware info structure.
> + * @num_irq:		Total Number of interrupts
> + */
> +struct rzg2l_hw_info {
> +	u8	num_irq;

Odd data type. Whats wrong with a good old unsigned int?

> +};
> +
>  /**
>   * struct rzg2l_irqc_priv - IRQ controller private data structure
>   * @base:	Controller's base address
>   * @irqchip:	Pointer to struct irq_chip
>   * @fwspec:	IRQ firmware specific data
>   * @lock:	Lock to serialize access to hardware registers
> + * @info:	Pointer to struct rzg2l_hw_info

Why a pointer?

>   * @cache:	Registers cache for suspend/resume
>   */
>  static struct rzg2l_irqc_priv {
> @@ -81,6 +89,7 @@ static struct rzg2l_irqc_priv {
>  	const struct irq_chip		*irqchip;
>  	struct irq_fwspec		*fwspec;
>  	raw_spinlock_t			lock;
> +	const struct rzg2l_hw_info	*info;
>  	struct rzg2l_irqc_reg_cache	cache;
>  } *rzg2l_irqc_data;
>  
> @@ -136,7 +145,7 @@ static void rzg2l_irqc_eoi(struct irq_data *d)
>  	raw_spin_lock(&priv->lock);
>  	if (hw_irq >= IRQC_IRQ_START && hw_irq <= IRQC_IRQ_COUNT)
>  		rzg2l_clear_irq_int(priv, hw_irq);
> -	else if (hw_irq >= IRQC_TINT_START && hw_irq < IRQC_NUM_IRQ)
> +	else if (hw_irq >= IRQC_TINT_START && hw_irq < priv->info->num_irq)

Ah I see. To make this more expensive by accessing yet another cache
line. Simply embed a struct hwinfo into irqc_priv and copy the data into
it at probe time.

 
> -	if (hwirq > (IRQC_NUM_IRQ - 1))
> +	if (hwirq > (priv->info->num_irq - 1))

  hwirq >= priv->info.num_irq

This -1 logic is horrible and error prone.

Thanks,

        tglx

  reply	other threads:[~2026-02-06 11:50 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-06 11:16 [PATCH v3 0/9] Add RZ/G3L IRQC support Biju
2026-02-06 11:16 ` [PATCH v3 1/9] dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Use pattern for interrupt-names Biju
2026-02-07 10:33   ` Krzysztof Kozlowski
2026-02-07 11:19     ` Biju Das
2026-02-06 11:16 ` [PATCH v3 2/9] dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Document RZ/G3L SoC Biju
2026-02-07 10:35   ` Krzysztof Kozlowski
2026-02-07 11:24     ` Biju Das
2026-02-06 11:16 ` [PATCH v3 3/9] irqchip/renesas-rzg2l: Make fwspec variable as pointer in struct rzg2l_irqc_priv Biju
2026-02-06 11:42   ` Thomas Gleixner
2026-02-24 13:46     ` Biju Das
2026-02-06 11:16 ` [PATCH v3 4/9] irqchip/renesas-rzg2l: Drop IRQC_NUM_IRQ macro Biju
2026-02-06 11:50   ` Thomas Gleixner [this message]
2026-02-24 13:49     ` Biju Das
2026-02-06 11:16 ` [PATCH v3 5/9] irqchip/renesas-rzg2l: Drop IRQC_TINT_START macro Biju
2026-02-06 11:16 ` [PATCH v3 6/9] irqchip/renesas-rzg2l: Drop IRQC_IRQ_COUNT macro Biju
2026-02-06 11:16 ` [PATCH v3 7/9] irqchip/renesas-rzg2l: Add RZ/G3L support Biju
2026-02-06 11:58   ` Thomas Gleixner
2026-02-24 13:50     ` Biju Das
2026-02-06 11:16 ` [PATCH v3 8/9] irqchip/renesas-rzg2l: Add shared irq support Biju
2026-02-06 11:16 ` [PATCH v3 9/9] arm64: dts: renesas: r9a08g046: Add ICU node Biju
2026-02-06 11:37 ` [PATCH v3 0/9] Add RZ/G3L IRQC support Thomas Gleixner
2026-02-06 11:49   ` Biju Das

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