[PATCH v2 0/2] Add Apple interrupt controller 3 support

[PATCH v2 0/2] Add Apple interrupt controller 3 support

[Janne Grunau]

Add yet another variant of Apple's interrupt controller. This one might
to stick for more SoC variants than their predecessors. According to
Apple's device trees it is used on all SoCs since the M3 (t8122) up to
M5 (t8142). This information is not 100% reliable since macOS uses
different kernel builds for each SoC variant.
As far as the functionality implemented in the Linux driver it is almost
identical to AICv2. The only noticeable difference is an increased
IRQ_CFG offset.
AICv3 uses the same device tree bindings as AICv2 so add its compatible
to the existing apple,aic2.yaml.
Apple's device tree added many MMIO offsets as properties for the
"aic,3" node. The offsets are the same for all released SoCs with AICv3
so the Linux driver continues to use hard coded offsets.
Compatible strings for AICv3 will be SoC specific like
"apple,t8122-aic3" so a potential future SoC with different offsets
would use a new base compatible string for which the driver uses
different MMIO offsets.
While the offsets are the same on M4 and later SoCs access to
implementation defined system registers will require different
compatible strings.

Signed-off-by: Janne Grunau <j@jannau.net>
---
Changes in v2:
- allow single "apple,t8122-aic3" compatible in the bindings
- drop leftover #include <linux/of.h> as it's not justified by the
  contents
- comment and white space style fixes
- sort cases by version in switch statement
- Add Sven's Rb:
- Link to v1: https://lore.kernel.org/r/20260125-irq-apple-aic3-v1-0-a2afe66a6ab9@jannau.net

---
Janne Grunau (2):
      dt-bindings: interrupt-controller: apple,aic2: Add AICv3
      irqchip/apple-aic: Add support for "apple,t8122-aic3"

 .../bindings/interrupt-controller/apple,aic2.yaml  | 45 +++++++++++++++++-----
 drivers/irqchip/irq-apple-aic.c                    | 24 ++++++++++--
 2 files changed, 57 insertions(+), 12 deletions(-)
---
base-commit: 8f0b4cce4481fb22653697cced8d0d04027cb1e8
change-id: 20260119-irq-apple-aic3-0314f6aa2a2a

Best regards,
-- 
Janne Grunau <j@jannau.net>

[PATCH v2 1/2] dt-bindings: interrupt-controller: apple,aic2: Add AICv3

[Janne Grunau]

AIC version 3 as found on the Apple M3 (t8122) is very similar to AICv2
in its base functionality. It can use the same device tree bindings as
AICv2 so add it to the AICv2 bindings.
This interrupt controller is used on all Apple SoCs starting with M3 up
to at least M5.
The only apparent difference is the increased IRQ config offset. Apple's
device tree codes this new offset as property of the "aic" node but the
value stayed constant for all SoCs with "aic,3". Since the SoC specific
compatible "apple,t8122-aic3" will be used in the driver this offset can
remain a driver implementation detail.

Signed-off-by: Janne Grunau <j@jannau.net>
---
 .../bindings/interrupt-controller/apple,aic2.yaml  | 45 +++++++++++++++++-----
 1 file changed, 36 insertions(+), 9 deletions(-)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
index ee5a0dfff437816056bda0de5523bf38be4f49ba..a6e2251fcc111340c0a27ab6912452f6b1255be2 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
@@ -4,10 +4,10 @@
 $id: http://devicetree.org/schemas/interrupt-controller/apple,aic2.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 
-title: Apple Interrupt Controller 2
+title: Apple Interrupt Controller 2 and 3
 
 maintainers:
-  - Hector Martin <marcan@marcan.st>
+  - Janne Grunau <j@jannau.net>
 
 description: |
   The Apple Interrupt Controller 2 is a simple interrupt controller present on
@@ -28,14 +28,24 @@ description: |
   which do not go through a discrete interrupt controller. It also handles
   FIQ-based Fast IPIs.
 
+  The Apple Interrupt Controller 3 is in its base functionality very similar to
+  the Apple Interrupt Controller 2 and uses the same device tree bindings. It is
+  found on Apple ARM SoCs platforms starting with t8122 (M3).
+
 properties:
   compatible:
-    items:
-      - enum:
-          - apple,t8112-aic
-          - apple,t6000-aic
-          - apple,t6020-aic
-      - const: apple,aic2
+    oneOf:
+      - items:
+          - enum:
+              - apple,t8112-aic
+              - apple,t6000-aic
+              - apple,t6020-aic
+          - const: apple,aic2
+      - items:
+          - enum:
+              - apple,t6030-aic3
+          - const: apple,t8122-aic3
+      - const: apple,t8122-aic3
 
   interrupt-controller: true
 
@@ -117,7 +127,9 @@ allOf:
       properties:
         compatible:
           contains:
-            const: apple,t8112-aic
+            enum:
+              - apple,t8112-aic
+              - apple,t8122-aic3
     then:
       properties:
         '#interrupt-cells':
@@ -141,4 +153,19 @@ examples:
                   <0x2 0x8e10c000 0x0 0x4>;
             reg-names = "core", "event";
         };
+
+    };
+  - |
+    soc {
+        #address-cells = <2>;
+        #size-cells = <2>;
+
+        aic_t8122: interrupt-controller@2d1000000 {
+            compatible = "apple,t8122-aic3";
+            #interrupt-cells = <3>;
+            interrupt-controller;
+            reg = <0x2 0xd1000000 0x0 0xc000>,
+                  <0x2 0xd1040000 0x0 0x4>;
+            reg-names = "core", "event";
+        };
     };

-- 
2.52.0

Re: [PATCH v2 1/2] dt-bindings: interrupt-controller: apple,aic2: Add AICv3

[Thomas Gleixner]

On Wed, Jan 28 2026 at 09:57, Janne Grunau wrote:
> AIC version 3 as found on the Apple M3 (t8122) is very similar to AICv2
> in its base functionality. It can use the same device tree bindings as
> AICv2 so add it to the AICv2 bindings.
> This interrupt controller is used on all Apple SoCs starting with M3 up
> to at least M5.
> The only apparent difference is the increased IRQ config offset. Apple's
> device tree codes this new offset as property of the "aic" node but the
> value stayed constant for all SoCs with "aic,3". Since the SoC specific
> compatible "apple,t8122-aic3" will be used in the driver this offset can
> remain a driver implementation detail.
>
> Signed-off-by: Janne Grunau <j@jannau.net>

Can the device tree folks please have a look at this?

Re: [PATCH v2 1/2] dt-bindings: interrupt-controller: apple,aic2: Add AICv3

[Krzysztof Kozlowski]

On Wed, Jan 28, 2026 at 09:57:08AM +0100, Janne Grunau wrote:
> AIC version 3 as found on the Apple M3 (t8122) is very similar to AICv2
> in its base functionality. It can use the same device tree bindings as
> AICv2 so add it to the AICv2 bindings.
> This interrupt controller is used on all Apple SoCs starting with M3 up
> to at least M5.
> The only apparent difference is the increased IRQ config offset. Apple's
> device tree codes this new offset as property of the "aic" node but the
> value stayed constant for all SoCs with "aic,3". Since the SoC specific
> compatible "apple,t8122-aic3" will be used in the driver this offset can
> remain a driver implementation detail.
> 
> Signed-off-by: Janne Grunau <j@jannau.net>
> ---
>  .../bindings/interrupt-controller/apple,aic2.yaml  | 45 +++++++++++++++++-----
>  1 file changed, 36 insertions(+), 9 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
> index ee5a0dfff437816056bda0de5523bf38be4f49ba..a6e2251fcc111340c0a27ab6912452f6b1255be2 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
> +++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
> @@ -4,10 +4,10 @@
>  $id: http://devicetree.org/schemas/interrupt-controller/apple,aic2.yaml#
>  $schema: http://devicetree.org/meta-schemas/core.yaml#
>  
> -title: Apple Interrupt Controller 2
> +title: Apple Interrupt Controller 2 and 3
>  
>  maintainers:
> -  - Hector Martin <marcan@marcan.st>
> +  - Janne Grunau <j@jannau.net>
>  
>  description: |
>    The Apple Interrupt Controller 2 is a simple interrupt controller present on
> @@ -28,14 +28,24 @@ description: |
>    which do not go through a discrete interrupt controller. It also handles
>    FIQ-based Fast IPIs.
>  
> +  The Apple Interrupt Controller 3 is in its base functionality very similar to
> +  the Apple Interrupt Controller 2 and uses the same device tree bindings. It is
> +  found on Apple ARM SoCs platforms starting with t8122 (M3).
> +
>  properties:
>    compatible:
> -    items:
> -      - enum:
> -          - apple,t8112-aic
> -          - apple,t6000-aic
> -          - apple,t6020-aic
> -      - const: apple,aic2
> +    oneOf:
> +      - items:
> +          - enum:
> +              - apple,t8112-aic
> +              - apple,t6000-aic
> +              - apple,t6020-aic

If you are re-shuffling these, you can as well sort alphanumerically.

> +          - const: apple,aic2
> +      - items:
> +          - enum:
> +              - apple,t6030-aic3
> +          - const: apple,t8122-aic3
> +      - const: apple,t8122-aic3

Hm? How so this is not aic or aic2? We asked not to use generic compatibles
for aic/aic2 - for all your early upstreamings. Our advice and request
was in general rejected, although I could make a long term bet that we
will be right. And here we are.

Does this patch mean you finally agree with DT maintainers and abandon
the generic compatible fiasko?


>  
>    interrupt-controller: true
>  
> @@ -117,7 +127,9 @@ allOf:
>        properties:
>          compatible:
>            contains:
> -            const: apple,t8112-aic
> +            enum:
> +              - apple,t8112-aic
> +              - apple,t8122-aic3
>      then:
>        properties:
>          '#interrupt-cells':
> @@ -141,4 +153,19 @@ examples:
>                    <0x2 0x8e10c000 0x0 0x4>;
>              reg-names = "core", "event";
>          };
> +
> +    };
> +  - |
> +    soc {
> +        #address-cells = <2>;
> +        #size-cells = <2>;
> +
> +        aic_t8122: interrupt-controller@2d1000000 {
> +            compatible = "apple,t8122-aic3";

No need for new example which has no differences from other ones. Drop.

Best regards,
Krzysztof

Re: [PATCH v2 1/2] dt-bindings: interrupt-controller: apple,aic2: Add AICv3

[Sven Peter]

Hi,

On 05.02.26 13:50, Krzysztof Kozlowski wrote:
> On Wed, Jan 28, 2026 at 09:57:08AM +0100, Janne Grunau wrote:
>> AIC version 3 as found on the Apple M3 (t8122) is very similar to AICv2
>> in its base functionality. It can use the same device tree bindings as
>> AICv2 so add it to the AICv2 bindings.
>> This interrupt controller is used on all Apple SoCs starting with M3 up
>> to at least M5.
>> The only apparent difference is the increased IRQ config offset. Apple's
>> device tree codes this new offset as property of the "aic" node but the
>> value stayed constant for all SoCs with "aic,3". Since the SoC specific
>> compatible "apple,t8122-aic3" will be used in the driver this offset can
>> remain a driver implementation detail.
>>
>> Signed-off-by: Janne Grunau <j@jannau.net>
>> ---
>>   .../bindings/interrupt-controller/apple,aic2.yaml  | 45 +++++++++++++++++-----
>>   1 file changed, 36 insertions(+), 9 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
>> index ee5a0dfff437816056bda0de5523bf38be4f49ba..a6e2251fcc111340c0a27ab6912452f6b1255be2 100644
>> --- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
>> +++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
>> @@ -4,10 +4,10 @@
>>   $id: http://devicetree.org/schemas/interrupt-controller/apple,aic2.yaml#
>>   $schema: http://devicetree.org/meta-schemas/core.yaml#
>>   
>> -title: Apple Interrupt Controller 2
>> +title: Apple Interrupt Controller 2 and 3
>>   
>>   maintainers:
>> -  - Hector Martin <marcan@marcan.st>
>> +  - Janne Grunau <j@jannau.net>
>>   
>>   description: |
>>     The Apple Interrupt Controller 2 is a simple interrupt controller present on
>> @@ -28,14 +28,24 @@ description: |
>>     which do not go through a discrete interrupt controller. It also handles
>>     FIQ-based Fast IPIs.
>>   
>> +  The Apple Interrupt Controller 3 is in its base functionality very similar to
>> +  the Apple Interrupt Controller 2 and uses the same device tree bindings. It is
>> +  found on Apple ARM SoCs platforms starting with t8122 (M3).
>> +
>>   properties:
>>     compatible:
>> -    items:
>> -      - enum:
>> -          - apple,t8112-aic
>> -          - apple,t6000-aic
>> -          - apple,t6020-aic
>> -      - const: apple,aic2
>> +    oneOf:
>> +      - items:
>> +          - enum:
>> +              - apple,t8112-aic
>> +              - apple,t6000-aic
>> +              - apple,t6020-aic
> 
> If you are re-shuffling these, you can as well sort alphanumerically.

I don't have a strong opinion here but the last time this came up we 
agreed that we'd go with release order IIRC for consistency since that 
order is used in every other binding for this platform.

> 
>> +          - const: apple,aic2
>> +      - items:
>> +          - enum:
>> +              - apple,t6030-aic3
>> +          - const: apple,t8122-aic3
>> +      - const: apple,t8122-aic3
> 
> Hm? How so this is not aic or aic2? We asked not to use generic compatibles
> for aic/aic2 - for all your early upstreamings. Our advice and request
> was in general rejected, although I could make a long term bet that we
> will be right. And here we are.
> 
> Does this patch mean you finally agree with DT maintainers and abandon
> the generic compatible fiasko?

Yeah, see 
https://lore.kernel.org/asahi/12ab93b7-1fc2-4ce0-926e-c8141cfe81bf@kernel.org/


Best,

Sven

Re: [PATCH v2 1/2] dt-bindings: interrupt-controller: apple,aic2: Add AICv3

[Janne Grunau]

On Thu, Feb 05, 2026 at 07:01:51PM +0100, Sven Peter wrote:
> Hi,
> 
> On 05.02.26 13:50, Krzysztof Kozlowski wrote:
> > On Wed, Jan 28, 2026 at 09:57:08AM +0100, Janne Grunau wrote:
> >> AIC version 3 as found on the Apple M3 (t8122) is very similar to AICv2
> >> in its base functionality. It can use the same device tree bindings as
> >> AICv2 so add it to the AICv2 bindings.
> >> This interrupt controller is used on all Apple SoCs starting with M3 up
> >> to at least M5.
> >> The only apparent difference is the increased IRQ config offset. Apple's
> >> device tree codes this new offset as property of the "aic" node but the
> >> value stayed constant for all SoCs with "aic,3". Since the SoC specific
> >> compatible "apple,t8122-aic3" will be used in the driver this offset can
> >> remain a driver implementation detail.
> >>
> >> Signed-off-by: Janne Grunau <j@jannau.net>
> >> ---
> >>   .../bindings/interrupt-controller/apple,aic2.yaml  | 45 +++++++++++++++++-----
> >>   1 file changed, 36 insertions(+), 9 deletions(-)
> >>
> >> diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
> >> index ee5a0dfff437816056bda0de5523bf38be4f49ba..a6e2251fcc111340c0a27ab6912452f6b1255be2 100644
> >> --- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
> >> +++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
> >> @@ -4,10 +4,10 @@
> >>   $id: http://devicetree.org/schemas/interrupt-controller/apple,aic2.yaml#
> >>   $schema: http://devicetree.org/meta-schemas/core.yaml#
> >>   
> >> -title: Apple Interrupt Controller 2
> >> +title: Apple Interrupt Controller 2 and 3
> >>   
> >>   maintainers:
> >> -  - Hector Martin <marcan@marcan.st>
> >> +  - Janne Grunau <j@jannau.net>
> >>   
> >>   description: |
> >>     The Apple Interrupt Controller 2 is a simple interrupt controller present on
> >> @@ -28,14 +28,24 @@ description: |
> >>     which do not go through a discrete interrupt controller. It also handles
> >>     FIQ-based Fast IPIs.
> >>   
> >> +  The Apple Interrupt Controller 3 is in its base functionality very similar to
> >> +  the Apple Interrupt Controller 2 and uses the same device tree bindings. It is
> >> +  found on Apple ARM SoCs platforms starting with t8122 (M3).
> >> +
> >>   properties:
> >>     compatible:
> >> -    items:
> >> -      - enum:
> >> -          - apple,t8112-aic
> >> -          - apple,t6000-aic
> >> -          - apple,t6020-aic
> >> -      - const: apple,aic2
> >> +    oneOf:
> >> +      - items:
> >> +          - enum:
> >> +              - apple,t8112-aic
> >> +              - apple,t6000-aic
> >> +              - apple,t6020-aic
> > 
> > If you are re-shuffling these, you can as well sort alphanumerically.
> 
> I don't have a strong opinion here but the last time this came up we 
> agreed that we'd go with release order IIRC for consistency since that 
> order is used in every other binding for this platform.

The intended scheme as documented in some commit messages is first base
Mx SoCs in release order and then Mx Pro/Max/Ultra SoCs in release
order. This scheme isn't used consistently though. I think I fixed that
in one or two bindings already but there are other using a different
order.
I think these unecessarily complex rules are guaranteed to lead to
inconsistencies. I'll resort the entries alphabetically as that's the
only rule with a chance of consistent use.

Janne

Re: [PATCH v2 1/2] dt-bindings: interrupt-controller: apple,aic2: Add AICv3

[Sven Peter]

On 05.02.26 23:19, Janne Grunau wrote:
> On Thu, Feb 05, 2026 at 07:01:51PM +0100, Sven Peter wrote:
>> Hi,
>>
>> On 05.02.26 13:50, Krzysztof Kozlowski wrote:
>>> On Wed, Jan 28, 2026 at 09:57:08AM +0100, Janne Grunau wrote:
>>>> AIC version 3 as found on the Apple M3 (t8122) is very similar to AICv2
>>>> in its base functionality. It can use the same device tree bindings as
>>>> AICv2 so add it to the AICv2 bindings.
>>>> This interrupt controller is used on all Apple SoCs starting with M3 up
>>>> to at least M5.
>>>> The only apparent difference is the increased IRQ config offset. Apple's
>>>> device tree codes this new offset as property of the "aic" node but the
>>>> value stayed constant for all SoCs with "aic,3". Since the SoC specific
>>>> compatible "apple,t8122-aic3" will be used in the driver this offset can
>>>> remain a driver implementation detail.
>>>>
>>>> Signed-off-by: Janne Grunau <j@jannau.net>
>>>> ---
>>>>    .../bindings/interrupt-controller/apple,aic2.yaml  | 45 +++++++++++++++++-----
>>>>    1 file changed, 36 insertions(+), 9 deletions(-)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
>>>> index ee5a0dfff437816056bda0de5523bf38be4f49ba..a6e2251fcc111340c0a27ab6912452f6b1255be2 100644
>>>> --- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
>>>> +++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
>>>> @@ -4,10 +4,10 @@
>>>>    $id: http://devicetree.org/schemas/interrupt-controller/apple,aic2.yaml#
>>>>    $schema: http://devicetree.org/meta-schemas/core.yaml#
>>>>    
>>>> -title: Apple Interrupt Controller 2
>>>> +title: Apple Interrupt Controller 2 and 3
>>>>    
>>>>    maintainers:
>>>> -  - Hector Martin <marcan@marcan.st>
>>>> +  - Janne Grunau <j@jannau.net>
>>>>    
>>>>    description: |
>>>>      The Apple Interrupt Controller 2 is a simple interrupt controller present on
>>>> @@ -28,14 +28,24 @@ description: |
>>>>      which do not go through a discrete interrupt controller. It also handles
>>>>      FIQ-based Fast IPIs.
>>>>    
>>>> +  The Apple Interrupt Controller 3 is in its base functionality very similar to
>>>> +  the Apple Interrupt Controller 2 and uses the same device tree bindings. It is
>>>> +  found on Apple ARM SoCs platforms starting with t8122 (M3).
>>>> +
>>>>    properties:
>>>>      compatible:
>>>> -    items:
>>>> -      - enum:
>>>> -          - apple,t8112-aic
>>>> -          - apple,t6000-aic
>>>> -          - apple,t6020-aic
>>>> -      - const: apple,aic2
>>>> +    oneOf:
>>>> +      - items:
>>>> +          - enum:
>>>> +              - apple,t8112-aic
>>>> +              - apple,t6000-aic
>>>> +              - apple,t6020-aic
>>>
>>> If you are re-shuffling these, you can as well sort alphanumerically.
>>
>> I don't have a strong opinion here but the last time this came up we
>> agreed that we'd go with release order IIRC for consistency since that
>> order is used in every other binding for this platform.
> 
> The intended scheme as documented in some commit messages is first base
> Mx SoCs in release order and then Mx Pro/Max/Ultra SoCs in release
> order. This scheme isn't used consistently though. I think I fixed that
> in one or two bindings already but there are other using a different
> order.
> I think these unecessarily complex rules are guaranteed to lead to
> inconsistencies. I'll resort the entries alphabetically as that's the
> only rule with a chance of consistent use.

Sure, I'm totally fine with just using alphanumeric order everywhere as 
well.


Sven

[PATCH v2 2/2] irqchip/apple-aic: Add support for "apple,t8122-aic3"

[Janne Grunau]

Introduce support for the new AICv3 hardware block in t8122 and t603x
SoCs. AICv3 is similar to AICv2 but has an increased IRQ config offset.
These MMIO offsets are coded as properties of the "aic,3" node in
Apple's device tree. The actual offsets are the same for all SoCs
starting from M3 through at least M5. So do not bother to follow suit
but use AICv3 specific defines in the driver.
The compatible string is SoC specific so future SoCs with AICv3 and
different offsets would just use their own compatible string as base and
add their new offsets.

Reviewed-by: Sven Peter <sven@kernel.org>
Signed-off-by: Janne Grunau <j@jannau.net>
---
 drivers/irqchip/irq-apple-aic.c | 24 +++++++++++++++++++++---
 1 file changed, 21 insertions(+), 3 deletions(-)

diff --git a/drivers/irqchip/irq-apple-aic.c b/drivers/irqchip/irq-apple-aic.c
index 3c70364e7cddd6ed6285595f136146ab04b897b2..4607d28f23887fb4bfe286a398d5a5b2f840e716 100644
--- a/drivers/irqchip/irq-apple-aic.c
+++ b/drivers/irqchip/irq-apple-aic.c
@@ -134,8 +134,12 @@
 
 #define AIC2_IRQ_CFG		0x2000
 
+/* AIC v3 registers (MMIO) */
+#define AIC3_IRQ_CFG		0x10000
+
 /*
  * AIC2 registers are laid out like this, starting at AIC2_IRQ_CFG:
+ * AIC3 registers use the same layout but start at AIC3_IRQ_CFG:
  *
  * Repeat for each die:
  *   IRQ_CFG: u32 * MAX_IRQS
@@ -293,6 +297,15 @@ static const struct aic_info aic2_info __initconst = {
 	.local_fast_ipi = true,
 };
 
+static const struct aic_info aic3_info __initconst = {
+	.version	= 3,
+
+	.irq_cfg	= AIC3_IRQ_CFG,
+
+	.fast_ipi	= true,
+	.local_fast_ipi = true,
+};
+
 static const struct of_device_id aic_info_match[] = {
 	{
 		.compatible = "apple,t8103-aic",
@@ -310,6 +323,10 @@ static const struct of_device_id aic_info_match[] = {
 		.compatible = "apple,aic2",
 		.data = &aic2_info,
 	},
+	{
+		.compatible = "apple,t8122-aic3",
+		.data = &aic3_info,
+	},
 	{}
 };
 
@@ -620,7 +637,7 @@ static int aic_irq_domain_map(struct irq_domain *id, unsigned int irq,
 	u32 type = FIELD_GET(AIC_EVENT_TYPE, hw);
 	struct irq_chip *chip = &aic_chip;
 
-	if (ic->info.version == 2)
+	if (ic->info.version == 2 || ic->info.version == 3)
 		chip = &aic2_chip;
 
 	if (type == AIC_EVENT_TYPE_IRQ) {
@@ -991,7 +1008,7 @@ static int __init aic_of_ic_init(struct device_node *node, struct device_node *p
 
 		break;
 	}
-	case 2: {
+	case 2 ... 3: {
 		u32 info1, info3;
 
 		info1 = aic_ic_read(irqc, AIC2_INFO1);
@@ -1065,7 +1082,7 @@ static int __init aic_of_ic_init(struct device_node *node, struct device_node *p
 		off += irqc->info.die_stride;
 	}
 
-	if (irqc->info.version == 2) {
+	if (irqc->info.version == 2 || irqc->info.version == 3) {
 		u32 config = aic_ic_read(irqc, AIC2_CONFIG);
 
 		config |= AIC2_CONFIG_ENABLE;
@@ -1116,3 +1133,4 @@ static int __init aic_of_ic_init(struct device_node *node, struct device_node *p
 
 IRQCHIP_DECLARE(apple_aic, "apple,aic", aic_of_ic_init);
 IRQCHIP_DECLARE(apple_aic2, "apple,aic2", aic_of_ic_init);
+IRQCHIP_DECLARE(apple_aic3, "apple,t8122-aic3", aic_of_ic_init);

-- 
2.52.0