From: Thomas Gleixner <tglx@kernel.org>
To: Luigi Rizzo <lrizzo@google.com>
Cc: Marc Zyngier <maz@kernel.org>,
bhelgaas@google.com, linux-kernel@vger.kernel.org
Subject: Re: [patch 1/2] irqchip/msi-lib: Honor the MSI_FLAG_PCI_MSI_MASK_PARENT flag
Date: Fri, 09 Jan 2026 13:20:15 +0100 [thread overview]
Message-ID: <878qe7rn9c.ffs@tglx> (raw)
In-Reply-To: <CAMOZA0LzVSDc+HVA36WeRHciw3uXz62eN5rYQQ3MdP_YBHFROQ@mail.gmail.com>
On Thu, Jan 08 2026 at 22:55, Luigi Rizzo wrote:
> On Thu, Jan 8, 2026 at 10:32 PM Thomas Gleixner <tglx@linutronix.de> wrote:
>>
>> On Mon, Dec 22 2025 at 16:16, Marc Zyngier wrote:
>> >> > > Once we remove the costly readback, is there any remaining reason
>> >> > > to overwrite [un]mask_irq() with irq_chip_[un]mask_parent() ?
>> >> >
>> >> > So you are effectively not masking at all and just rely on hope
>> >> > instead. I have the utmost confidence in this sort of stuff. Totally.
>> >>
>> >> I don't understand the above comment.
>> >> Masking happens as a result of the PCIe write,
>> >> which will eventually reach the device. The presence of the
>> >> readback does nothing to accelerate the landing of the write.
>> >
>> > It doesn't accelerate it. It *guarantees* that the write is observed
>> > and has taken effect. It acts as a completion barrier. Without it, the
>> > write can be buffered at an arbitrary location in the interconnect, or
>> > stored in the device but not acted upon.
>> >
>> > What you have here is the equivalent of throwing a message in a bottle
>> > at sea, and expecting a guaranteed reply.
>>
>> https://xkcd.com/3150/
>
>
> The irony is that the change I was commenting about
> completely removes masking at the PCI level (ie not even the bottle).
>
> Anyways, coming back to my secondary point,
> which is what does the readback give us, I want to repeat my arguments:
>
> - knowing that the mask() has landed on the device does not guarantee
> that there was not a previously generated MSIx write in transit.
> So even with the readback, the interrupt subsystem must be
> prepared to handle the pending interrupt (which of course it is).
That's not the point. The point is that _after_ the mask has reached the
device it is guaranteed that no further interrupts are generated until
unmask() is invoked. That's what is required e.g. for writing the MSI
message to the device.
> - if the concern is that the mask() write may never reach the
> device, there is no reason to expect that the unmask()
> will be treated differently. Yet, the unmask() has no readback
It will reach the device at some random point in time. The queued writes
are not lost. They are drained at some point and unmask() does not
require an guarantee like mask() does.
> - unless I am missing some cases, outside of moderation
> the mask() is only ever called on interrupt
> shutdown or on affinity migration.
Correct.
Thanks,
tglx
next prev parent reply other threads:[~2026-01-09 12:20 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-17 10:30 [PATCH] irqchip/msi-lib: Honor the MSI_FLAG_PCI_MSI_MASK_PARENT flag Marc Zyngier
2025-05-17 19:59 ` Thomas Gleixner
2025-05-23 9:06 ` Marc Zyngier
2025-06-30 8:59 ` Thomas Gleixner
2025-09-03 14:04 ` [patch 0/2] PCI/MSI: Avoid PCI level masking during normal operation if requested Thomas Gleixner
2025-09-03 14:04 ` [patch 1/2] irqchip/msi-lib: Honor the MSI_FLAG_PCI_MSI_MASK_PARENT flag Thomas Gleixner
2025-09-09 12:47 ` [tip: irq/drivers] " tip-bot2 for Marc Zyngier
2025-12-20 19:31 ` [patch 1/2] " Luigi Rizzo
2025-12-21 11:55 ` Marc Zyngier
2025-12-21 12:41 ` Luigi Rizzo
2025-12-22 16:16 ` Marc Zyngier
2026-01-08 21:32 ` Thomas Gleixner
2026-01-08 21:55 ` Luigi Rizzo
2026-01-09 12:20 ` Thomas Gleixner [this message]
2026-01-09 13:00 ` Luigi Rizzo
2026-01-09 17:01 ` Thomas Gleixner
2025-09-03 14:04 ` [patch 2/2] PCI/MSI: Remove the conditional parent [un]mask logic Thomas Gleixner
2025-09-03 17:38 ` Bjorn Helgaas
2025-09-09 12:47 ` [tip: irq/drivers] " tip-bot2 for Thomas Gleixner
2025-09-09 10:21 ` [patch 0/2] PCI/MSI: Avoid PCI level masking during normal operation if requested Marc Zyngier
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