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From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Santhosh Kumar K <s-k6@ti.com>
Cc: <richard@nod.at>,  <vigneshr@ti.com>,  <quic_sridsn@quicinc.com>,
	<quic_mdalam@quicinc.com>,  <linux-mtd@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>,  <p-mantena@ti.com>
Subject: Re: [PATCH 1/3] mtd: spinand: Define OctalIO ops
Date: Wed, 15 Jan 2025 20:19:48 +0100	[thread overview]
Message-ID: <87a5brlwa3.fsf@bootlin.com> (raw)
In-Reply-To: <20250102115110.1402440-2-s-k6@ti.com> (Santhosh Kumar K.'s message of "Thu, 2 Jan 2025 17:21:08 +0530")

Hello Santhosh,

On 02/01/2025 at 17:21:08 +0530, Santhosh Kumar K <s-k6@ti.com> wrote:

> Define the macros for Octal-based read and load operations on OSPI
> NAND flashes.

Following a recent discussion with the SPI-NOR maintainers, I plan on
renaming some of these macros to make them more clear regarding what
they do. There are many ways to do octal transfers (data only, address
and data, all cycles, sdr vs dtr...) and we want to clarify that.

Also, I believe there are frequency limitations which are not correctly
declared and possibly some issues with the dummy cycles which need to be
clarified, especially in the Winbond driver.

I plan on working on this in the next weeks, once my head is clear about
the specificities with these chips. I will add you in Cc.

Cheers,
Miquèl

  reply	other threads:[~2025-01-15 19:19 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-02 11:51 [PATCH 0/3] Add OSPI NAND support Santhosh Kumar K
2025-01-02 11:51 ` [PATCH 1/3] mtd: spinand: Define OctalIO ops Santhosh Kumar K
2025-01-15 19:19   ` Miquel Raynal [this message]
2025-01-27  6:48     ` Santhosh Kumar K
2025-01-02 11:51 ` [PATCH 2/3] mtd: spinand: winbond: Add support for W35N01JW Santhosh Kumar K
2025-01-02 11:51 ` [PATCH 3/3] mtd: spinand: winbond: Fix oob_layout for W25N01JW Santhosh Kumar K
2025-01-15 19:16   ` Miquel Raynal
2025-01-27  6:48     ` Santhosh Kumar K

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