From: "Toke Høiland-Jørgensen" <toke@redhat.com>
To: "Pali Rohár" <pali@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Kalle Valo" <kvalo@codeaurora.org>,
"Marek Behún" <kabel@kernel.org>
Cc: vtolkm@gmail.com, Rob Herring <robh@kernel.org>,
Ilias Apalodimas <ilias.apalodimas@linaro.org>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Jason Cooper <jason@lakedaemon.net>,
linux-pci@vger.kernel.org, ath10k@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] PCI: Disallow retraining link for Atheros QCA98xx chips on non-Gen1 PCIe bridges
Date: Fri, 26 Mar 2021 19:13:15 +0100 [thread overview]
Message-ID: <87a6qpbx6s.fsf@toke.dk> (raw)
In-Reply-To: <20210326124326.21163-1-pali@kernel.org>
Pali Rohár <pali@kernel.org> writes:
> Atheros QCA9880 and QCA9890 chips do not behave after a bus reset and also
> after retrain link when PCIe bridge is not in GEN1 mode at 2.5 GT/s speed.
> The device will throw a Link Down error and config space is not accessible
> again. Retrain link can be called only when using GEN1 PCIe bridge or when
> PCIe bridge has forced link speed to 2.5 GT/s via PCI_EXP_LNKCTL2 register.
>
> This issue was reproduced with more Compex WLE900VX cards (QCA9880 based)
> on Armada 385 with pci-mvebu.c driver and also on Armada 3720 with
> pci-aardvark.c driver. Also this issue was reproduced with some "noname"
> card with QCA9890 WiFi chip on Armada 3720. All problematic cards with
> these QCA chips have PCI device id 0x003c.
>
> Tests showed that other WiFi cards based on AR93xx (PCI device id 0x0030)
> and AR9287 (PCI device id 0x002e) chips do not have these problems.
>
> To workaround this issue, this change introduces a new PCI quirk called
> PCI_DEV_FLAGS_NO_RETRAIN_LINK_WHEN_NOT_GEN1 for PCI device id 0x003c.
>
> When this quirk is set then kernel disallows triggering PCI_EXP_LNKCTL_RL
> bit in config space of PCIe Bridge in case PCIe Bridge is capable of higher
> speed than 2.5 GT/s and higher speed is already allowed. When PCIe Bridge
> has accessible LNKCTL2 register then kernel tries to force target link
> speed via PCI_EXP_LNKCTL2_TLS* bits to 2.5 GT/s. After this change it is
> possible to trigger PCI_EXP_LNKCTL_RL bit without causing issues on
> problematic Atheros QCA98xx cards.
>
> Currently only PCIe ASPM kernel code triggers this PCI_EXP_LNKCTL_RL bit,
> so quirk check is added only into pcie/aspm.c file.
>
> Signed-off-by: Pali Rohár <pali@kernel.org>
> Reported-by: Toke Høiland-Jørgensen <toke@redhat.com>
> Tested-by: Marek Behún <kabel@kernel.org>
> Link: https://lore.kernel.org/linux-pci/87h7l8axqp.fsf@toke.dk/
> Cc: stable@vger.kernel.org # c80851f6ce63a ("PCI: Add
> PCI_EXP_LNKCTL2_TLS* macros")
Thanks!
Tested-by: Toke Høiland-Jørgensen <toke@redhat.com>
next prev parent reply other threads:[~2021-03-26 18:14 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-26 12:43 [PATCH] PCI: Disallow retraining link for Atheros QCA98xx chips on non-Gen1 PCIe bridges Pali Rohár
2021-03-26 18:13 ` Toke Høiland-Jørgensen [this message]
2021-03-27 0:14 ` Krzysztof Wilczyński
2021-03-27 13:29 ` Pali Rohár
2021-03-27 14:42 ` Marek Behún
2021-03-27 17:33 ` Pali Rohár
2021-04-27 10:55 ` [PATCH v2] PCI: Disallow retraining link for Atheros " Pali Rohár
2021-04-30 11:41 ` Pali Rohár
2021-05-05 16:33 ` [PATCH v3] " Pali Rohár
2021-05-11 20:39 ` Pali Rohár
2021-05-28 0:08 ` Pali Rohár
2021-06-01 11:28 ` Krzysztof Wilczyński
2021-06-01 20:05 ` Bjorn Helgaas
2021-06-01 21:18 ` Pali Rohár
2021-06-02 0:00 ` Bjorn Helgaas
2021-06-02 12:08 ` Pali Rohár
2021-06-02 15:55 ` Bjorn Helgaas
2021-06-02 19:03 ` Pali Rohár
2021-06-16 21:38 ` Bjorn Helgaas
2021-06-21 14:28 ` Pali Rohár
2021-06-25 20:19 ` Bjorn Helgaas
2021-06-26 14:38 ` Pali Rohár
2021-06-21 14:39 ` Pali Rohár
2021-10-05 19:43 ` Jannis
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