From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752974AbcHOKbr convert rfc822-to-8bit (ORCPT ); Mon, 15 Aug 2016 06:31:47 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:49367 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752415AbcHOKbq (ORCPT ); Mon, 15 Aug 2016 06:31:46 -0400 X-IBM-Helo: d03dlp02.boulder.ibm.com X-IBM-MailFrom: aneesh.kumar@linux.vnet.ibm.com From: "Aneesh Kumar K.V" To: christophe leroy , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Scott Wood Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 0/6] powerpc/8xx: implementation of huge pages In-Reply-To: References: <8737m7a0j7.fsf@skywalker.in.ibm.com> Date: Mon, 15 Aug 2016 16:01:37 +0530 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8BIT X-TM-AS-GCONF: 00 X-Content-Scanned: Fidelis XPS MAILER x-cbid: 16081510-0016-0000-0000-0000046B4E85 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00005597; HX=3.00000240; KW=3.00000007; PH=3.00000004; SC=3.00000181; SDB=6.00744905; UDB=6.00350999; IPR=6.00517459; BA=6.00004662; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00012336; XFM=3.00000011; UTC=2016-08-15 10:31:44 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 16081510-0017-0000-0000-0000320414D4 Message-Id: <87a8ge492u.fsf@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2016-08-15_03:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=1 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1604210000 definitions=main-1608150123 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org christophe leroy writes: > Le 14/08/2016 à 16:27, Aneesh Kumar K.V a écrit : >> Christophe Leroy writes: >> >>> This set provides implementation of huge pages on the 8xx >>> >>> Christophe Leroy (6): >>> powerpc: port 64 bits pgtable_cache to 32 bits >>> powerpc: fix usage of _PAGE_RO in hugepage >>> powerpc/8xx: use r3 to scratch CR in ITLBmiss >>> powerpc/8xx: Move additional DTLBMiss handlers out of exception area >>> powerpc/8xx: make user addr DTLB miss the short path >>> powerpc/8xx: implementation of huge pages >> >> Patch 2,3,4,5 are not really related to hugepage implementation right ? >> May be that can be sent as a separate series ? >> > > Patch 2 is a lack in gup_hugepte: on 8xx, _PAGE_RW (hence _PAGE_WRITE) > is defined as 0 and _PAGE_RO must be set when the page in not writeable. > So that's a prerequisite to implementation of huge page > > Patch 3, 4, 5 are prerequisits for the implementation of huge page > handling in the TLB miss handlers: > * 3: for huge pages implementation we need to branch base of value of > bit 28 and 29 of the PGD entry. For this we need to preserve CR. > * 4: With the instructions related to hugepages, there is not enough > space anymore in the TLB Exception areas, so part of the it has to be > moved away. > * 5: That one might be seen as not directly related to hugepages, but it > requires patch 3. > > Maybe I should reorder into 3, 4, 5, 2, 1, 6 ? > Can't 3,4,5,2 be merged independent of the series ? Reading then suggested they are either fixes or performance improvements ? -aneesh