From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1162112AbdAEXgi (ORCPT ); Thu, 5 Jan 2017 18:36:38 -0500 Received: from foss.arm.com ([217.140.101.70]:34568 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753485AbdAEXgf (ORCPT ); Thu, 5 Jan 2017 18:36:35 -0500 Subject: Re: [PATCH 2/5] drivers: mmc: sunxi: limit A64 MMC2 to 8K DMA buffer To: Maxime Ripard , Rob Herring References: <1483398226-29321-1-git-send-email-andre.przywara@arm.com> <1483398226-29321-3-git-send-email-andre.przywara@arm.com> <20170104140750.7qs4pvggwjdj5cma@rob-hp-laptop> <20170105175746.fq6crpc3krz7tzxi@lukather> Cc: Ulf Hansson , Chen-Yu Tsai , Hans De Goede , Icenowy Zheng , Mark Rutland , devicetree@vger.kernel.org, linux-mmc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@googlegroups.com, linux-kernel@vger.kernel.org From: =?UTF-8?Q?Andr=c3=a9_Przywara?= Organization: ARM Ltd. Message-ID: <87b26848-4f86-f2d2-3f82-db0937c572e2@arm.com> Date: Thu, 5 Jan 2017 23:33:28 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.5.1 MIME-Version: 1.0 In-Reply-To: <20170105175746.fq6crpc3krz7tzxi@lukather> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 05/01/17 17:57, Maxime Ripard wrote: > Hi Rob, > > On Wed, Jan 04, 2017 at 08:07:50AM -0600, Rob Herring wrote: >> On Mon, Jan 02, 2017 at 11:03:43PM +0000, Andre Przywara wrote: >>> From: Maxime Ripard >>> >>> Unlike the A64 user manual reports, the third MMC controller on the >>> A64 (and the only one capable of 8-bit HS400 eMMC transfers) has a >>> DMA buffer size limit of 8KB (much like the very old Allwinner SoCs). >>> This does not affect the other two controllers, so introduce a new >>> DT compatible string to let the driver use different settings for that >>> particular device. This will also help to enable the high-speed transfer >>> modes of that controller later. >>> >>> Signed-off-by: Maxime Ripard >>> Signed-off-by: Andre Przywara >>> --- >>> Documentation/devicetree/bindings/mmc/sunxi-mmc.txt | 1 + >>> drivers/mmc/host/sunxi-mmc.c | 7 +++++++ >>> 2 files changed, 8 insertions(+) >> >> Acked-by: Rob Herring > > Some kind of a digression on this: we have three MMC controllers on > this SoC. Like this patch shows, the third one is clearly different, > and supports both more modes, a wider bus, and specific quirks. We > need a new compatible for this one, everything's perfect. > > However, the other two are mostly the same, but seems to need > different tuning parameters to get more performances out of the > controller (but this is unclear yet). How do we usually deal with > that? I guess you wanted to hear Rob's opinion ;-), but "get more performance" sounds like we add one (or more) properties to tune those values. If I get this right, it works with default values, but is sub-optimal? Cheers, Andre.