From: Thomas Gleixner <tglx@kernel.org>
To: Huacai Chen <chenhuacai@loongson.cn>
Cc: loongarch@lists.linux.dev, linux-kernel@vger.kernel.org,
Xuefeng Li <lixuefeng@loongson.cn>,
Huacai Chen <chenhuacai@gmail.com>,
Jiaxun Yang <jiaxun.yang@flygoat.com>,
Huacai Chen <chenhuacai@loongson.cn>
Subject: Re: [PATCH 1/7] irqchip/loongarch-avec: Adjust irqchip driver for 32BIT/64BIT
Date: Fri, 09 Jan 2026 13:09:29 +0100 [thread overview]
Message-ID: <87bjj3rnra.ffs@tglx> (raw)
In-Reply-To: <20251223080437.3367240-2-chenhuacai@loongson.cn>
On Tue, Dec 23 2025 at 16:04, Huacai Chen wrote:
> csr_read64() is only available on 64BIT LoongArch platform, so use
> recently added adaptive csr_read() instead, so as to make the driver
> work on both 32BIT and 64BIT platform.
>
> BTW, make avecintc_enable() be a no-op since it is only needed by 64BIT
> platform.
>
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
I assume Jiaxun is the author, which means that this lacks a
From: Jiaxun
line in the mail body before the change log starts. Please try again.
> static inline void avecintc_enable(void)
> {
> +#ifdef CONFIG_MACH_LOONGSON64
> u64 value;
>
> value = iocsr_read64(LOONGARCH_IOCSR_MISC_FUNC);
> value |= IOCSR_MISC_FUNC_AVEC_EN;
> iocsr_write64(value, LOONGARCH_IOCSR_MISC_FUNC);
> +#endif
Can't this be:
if (IS_ENABLED(CONFIG_MACH_LOONGSON64))
which is preferred over ifdeffery?
Thanks,
tglx
next prev parent reply other threads:[~2026-01-09 12:09 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-23 8:04 [PATCH 0/7] irqchip: Adjust LoongArch irqchip drivers for 32BIT/64BIT Huacai Chen
2025-12-23 8:04 ` [PATCH 1/7] irqchip/loongarch-avec: Adjust irqchip driver " Huacai Chen
2026-01-09 12:09 ` Thomas Gleixner [this message]
2026-01-09 12:23 ` Jiaxun Yang
2026-01-09 20:37 ` Thomas Gleixner
2026-01-13 4:41 ` Huacai Chen
2026-01-10 3:48 ` Huacai Chen
2025-12-23 8:04 ` [PATCH 2/7] irqchip/loongson-liointc: " Huacai Chen
2025-12-23 8:04 ` [PATCH 3/7] irqchip/loongson-eiointc: " Huacai Chen
2025-12-23 8:04 ` [PATCH 4/7] irqchip/loongson-htvec: " Huacai Chen
2025-12-23 8:04 ` [PATCH 5/7] irqchip/loongson-pch-msi: " Huacai Chen
2025-12-23 8:04 ` [PATCH 6/7] irqchip/loongson-pch-pic: " Huacai Chen
2025-12-23 8:04 ` [PATCH 7/7] irqchip: Allow LoongArch irqchip drivers on both 32BIT/64BIT Huacai Chen
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