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AJvYcCW8kk1z3Cg9ljfBGj8dBVTT/QBkuBmgMuXYbAiZM97WbR7TKL1EELM3nW9RWoTOOSbYxqP7EciSOwq8tQ/1Il86n5T0gJl6+CqjSC9i X-Gm-Message-State: AOJu0Yy6ZkR9HycSQYrnMF0jbIalzI7bOjjFCajemeKDB0xgAsRAUB5n IZfyqC/byGc6oAT6MOyip62QCgwcTc96eRY0q5jk5+jYcejyYvxqU4WkrsS9eA0= X-Google-Smtp-Source: AGHT+IGmKiPLP6iZJ8231zq2ISbOWAeyGZtgOmCIid0gBb3g2mEMGCtiGof9hqlaCaNgxv7yS+/6Pw== X-Received: by 2002:a5d:6192:0:b0:368:3717:10b3 with SMTP id ffacd0b85a97d-369bae23a3bmr5618969f8f.8.1721682306665; Mon, 22 Jul 2024 14:05:06 -0700 (PDT) Received: from localhost ([149.71.24.20]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-368787cedabsm9521320f8f.84.2024.07.22.14.05.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jul 2024 14:05:06 -0700 (PDT) From: Punit Agrawal To: palmer@dabbelt.com, Palmer Dabbelt Cc: paul.walmsley@sifive.com, costa.shul@redhat.com, aou@eecs.berkeley.edu, samitolvanen@google.com, corbet@lwn.net, Anup Patel , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, jesse@rivosinc.com, conor.dooley@microchip.com, Yunhui Cui , andy.chiu@sifive.com, cleger@rivosinc.com, linux-riscv@lists.infradead.org, jrtc27@jrtc27.com, evan@rivosinc.com, Punit Agrawal Subject: Re: [PATCH v4] RISC-V: Provide the frequency of time CSR via hwprobe In-Reply-To: <87jzhtmvqg.fsf@bytedance.com> (Punit Agrawal's message of "Wed, 10 Jul 2024 10:39:35 +0100") References: <20240702033731.71955-1-cuiyunhui@bytedance.com> <20240702033731.71955-2-cuiyunhui@bytedance.com> <87jzhtmvqg.fsf@bytedance.com> User-Agent: Gnus/5.13 (Gnus v5.13) Date: Mon, 22 Jul 2024 22:05:05 +0100 Message-ID: <87bk2pkuim.fsf@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain Punit Agrawal writes: > Hi, > > Yunhui Cui writes: > >> From: Palmer Dabbelt >> >> The RISC-V architecture makes a real time counter CSR (via RDTIME >> instruction) available for applications in U-mode but there is no >> architected mechanism for an application to discover the frequency >> the counter is running at. Some applications (e.g., DPDK) use the >> time counter for basic performance analysis as well as fine grained >> time-keeping. >> >> Add support to the hwprobe system call to export the time CSR >> frequency to code running in U-mode. >> >> Signed-off-by: Palmer Dabbelt >> Signed-off-by: Yunhui Cui >> Reviewed-by: Evan Green >> Reviewed-by: Anup Patel >> Acked-by: Punit Agrawal >> --- >> Documentation/arch/riscv/hwprobe.rst | 2 ++ >> arch/riscv/include/asm/hwprobe.h | 2 +- >> arch/riscv/include/uapi/asm/hwprobe.h | 1 + >> arch/riscv/kernel/sys_hwprobe.c | 5 +++++ >> 4 files changed, 9 insertions(+), 1 deletion(-) > > The commit looks ready to be merged. Will this picked up for the 6.11 > release? > > Once this is merged, we can send out the DPDK change relying on the > newly added key. I see the first part of RISC-V patches got merged for 6.11. Any chance for this patch to still make it for this cycle?