From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CA2B3C4332F for ; Sun, 5 Nov 2023 08:55:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230127AbjKEIzT (ORCPT ); Sun, 5 Nov 2023 03:55:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42870 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229455AbjKEIzR (ORCPT ); Sun, 5 Nov 2023 03:55:17 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8960AEE for ; Sun, 5 Nov 2023 01:55:14 -0700 (PDT) From: Thomas Gleixner DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1699174512; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=R+scDlDhNhkUPIshK5XB+h8FHetyDO/Mc6Boo17zPpg=; b=dG37TWZuavaMQfosqPxCDLUlRQFhum2NYQtMTSKFCDwpKzsZ+IL7MZ6lWvAgHDUNCoQfDU 3NwVsIMb1SX/empXV4zoXTIPCtniuOXkY7unTGEplkcJlKgIL9553VIBu85Oaycj1ZNNel PiWXTfL59detwIW1Rmd0xGTMCX84nirgLwZXCYJ0GylH7DekZddZoE6nQfTRmCeBxAMXpI kzpRyMrzBREziXcHBFV041C+3x/aSulY7GE+H0gpHL2EWz6kNHUCG9Q/xDY0WiJVFPnoUX qFwp65ENeOjDYroIb2hUW4S7yHe2NbdiZW6dM4aaEDamxXqE8l0cFSZY34Ww8w== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1699174512; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=R+scDlDhNhkUPIshK5XB+h8FHetyDO/Mc6Boo17zPpg=; b=q7GAEMPYyQ0uAcTxscpbCQH3x3bU4xe6KMBPB8vGkNgoScg5KE5PIDTjM0/M/av27nmqRe teReQ6U6yEm58kBg== To: Marc Zyngier , Fang Xiang Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v4] irqchip/gic-v3-its: Flush ITS tables before writing GITS_BASER registers in non-coherent GIC designs. In-Reply-To: <87o7g96duv.wl-maz@kernel.org> References: <20231030083256.4345-1-fangxiang3@xiaomi.com> <87o7g96duv.wl-maz@kernel.org> Date: Sun, 05 Nov 2023 09:55:11 +0100 Message-ID: <87bkc8inps.ffs@tglx> MIME-Version: 1.0 Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Nov 04 2023 at 09:56, Marc Zyngier wrote: > On Mon, 30 Oct 2023 08:32:56 +0000, > Fang Xiang wrote: >> >> In non-coherent GIC design, ITS tables should be clean and flushed >> to the PoV of the ITS before writing GITS_BASER registers, otherwise >> the ITS would read dirty tables and lead to UNPREDICTABLE behaviors. >> >> The ITS always got clean tables in initialization with this fix, by >> observing the signals from GIC. >> >> Furthermore, hoist the quirked non-shareable attributes earlier to >> save effort in tables setup. >> >> Suggested-by: Marc Zyngier >> Signed-off-by: Fang Xiang >> Tested-by: Fang Xiang > > Reviewed-by: Marc Zyngier Shouldn't this have a Fixes tag? My guess is: a8707f553884 ("irqchip/gic-v3: Add Rockchip 3588001 erratum workaround")