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From: Gregory CLEMENT <gregory.clement@free-electrons.com>
To: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
        Jason Cooper <jason@lakedaemon.net>,
        Marc Zyngier <marc.zyngier@arm.com>, linux-kernel@vger.kernel.org,
        devicetree@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
        Ian Campbell <ijc+devicetree@hellion.org.uk>,
        Pawel Moll <pawel.moll@arm.com>, Mark Rutland <mark.rutland@arm.com>,
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        Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
        linux-arm-kernel@lists.infradead.org,
        Shadi Ammouri <shadi@marvell.com>,
        Yehuda Yitschak <yehuday@marvell.com>, Omri Itach <omrii@marvell.com>,
        Hanna Hawa <hannah@marvell.com>, Nadav Haklai <nadavh@marvell.com>,
        Neta Zur Hershkovits <neta@marvell.com>
Subject: Re: [PATCH 4/4] arm64: dts: marvell: describe the PIC and PMU on Armada 7K/8K
References: <1470408921-447-1-git-send-email-thomas.petazzoni@free-electrons.com>
        <1470408921-447-5-git-send-email-thomas.petazzoni@free-electrons.com>
Date: Fri, 26 Aug 2016 10:58:20 +0200
In-Reply-To: <1470408921-447-5-git-send-email-thomas.petazzoni@free-electrons.com>
        (Thomas Petazzoni's message of "Fri, 5 Aug 2016 16:55:21 +0200")
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Hi Thomas,
 
 On ven., août 05 2016, Thomas Petazzoni <thomas.petazzoni@free-electrons.com> wrote:

> This commit adds the necessary Device Tree description for the PIC
> interrupt controller and the PMU available in the Marvell Armada 7K and
> Armada 8K SoCs.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

Applied on mvebu/dt64

Thanks,

Gregory
> ---
>  arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
> index eab1a42..e70b996 100644
> --- a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
> +++ b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
> @@ -128,6 +128,12 @@
>  					     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
>  			};
>  
> +			pmu {
> +				compatible = "arm,cortex-a72-pmu";
> +				interrupt-parent = <&pic>;
> +				interrupts = <17>;
> +			};
> +
>  			odmi: odmi@300000 {
>  				compatible = "marvell,odmi-controller";
>  				interrupt-controller;
> @@ -140,6 +146,14 @@
>  				marvell,spi-base = <128>, <136>, <144>, <152>;
>  			};
>  
> +			pic: interrupt-controller@3f0100 {
> +				compatible = "marvell,armada-8k-pic";
> +				reg = <0x3f0100 0x10>;
> +				#interrupt-cells = <1>;
> +				interrupt-controller;
> +				interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
> +			};
> +
>  			xor@400000 {
>  				compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
>  				reg = <0x400000 0x1000>,
> -- 
> 2.7.4
>

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com