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From: Miquel Raynal <miquel.raynal@bootlin.com>
To: "Michael Walle" <mwalle@kernel.org>
Cc: "Pratyush Yadav" <pratyush@kernel.org>,
	 "Takahiro Kuwano" <takahiro.kuwano@infineon.com>,
	 "Richard Weinberger" <richard@nod.at>,
	"Vignesh Raghavendra" <vigneshr@ti.com>,
	 "Jonathan Corbet" <corbet@lwn.net>,
	 "Sean Anderson" <sean.anderson@linux.dev>,
	 "Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
	 "Steam Lin" <STLin2@winbond.com>,
	 <linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	 <linux-doc@vger.kernel.org>
Subject: Re: [PATCH v4 10/27] mtd: spi-nor: swp: Create a helper that writes SR, CR and checks
Date: Wed, 06 May 2026 11:54:45 +0200	[thread overview]
Message-ID: <87cxz8n9qy.fsf@bootlin.com> (raw)
In-Reply-To: <DIBH3CCTRHPW.1J4LOJQAJ50XE@kernel.org> (Michael Walle's message of "Wed, 06 May 2026 11:06:22 +0200")

On 06/05/2026 at 11:06:22 +02, "Michael Walle" <mwalle@kernel.org> wrote:

> On Tue May 5, 2026 at 6:05 PM CEST, Pratyush Yadav wrote:
>> On Fri, Apr 03 2026, Miquel Raynal wrote:
>>
>>> There are many helpers already to either read and/or write SR and/or CR,
>>> as well as sometimes check the returned values. In order to be able to
>>> switch from a 1 byte status register to a 2 bytes status register while
>>> keeping the same level of verification, let's introduce a new helper
>>> that writes them both (atomically) and then reads them back (separated)
>>> to compare the values.
>>>
>>> In case 2 bytes registers are not supported, we still have the usual
>>> fallback available in the helper being exported to the rest of the core.
>>>
>>> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
>>
>> I'm confused. Doesn't spi_nor_write_16bit_sr_and_check() do the same
>> thing? How are these two different?
>
> So I've never come around to finish reviewing this series due to
> personal reasons, but here are my remarks. Personally, I really
> don't like all these multiple helpers doing almost the same thing.
> But it is what is is for now.
>
> Back when reviewing this series, I've digged into this and it mostly
> evolve around how to enable the QE bit, that is defined in the 15th
> SFDP DWORD. One could see how we could consolidate all the status
> register handling in one function which are then called by the
> different (specified) quad_enable helpers.

I already had a look, it doesn't seem so straightforward. But I will
look into it deeper, I am willing to improve things. There will anyway
be a wide variety of helpers because there is a wide variety of QER
possibilities. What we can do though, is to decouple status register
writing and QE bit masking.

However, I would like to point that this is totally orthogonal to the
whole (almost 30 patch long) locking cleanup and CMP feature series, so
I do not plan to change this particular implementation in
v5. Reorganising these helpers should be done in its own follow-up
series.

Thanks,
Miquèl

  reply	other threads:[~2026-05-06  9:54 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-03 16:09 [PATCH v4 00/27] mtd: spi-nor: Enhance software protection Miquel Raynal
2026-04-03 16:09 ` [PATCH v4 01/27] mtd: spi-nor: Drop duplicate Kconfig dependency Miquel Raynal
2026-04-03 16:09 ` [PATCH v4 02/27] mtd: spi-nor: debugfs: Fix the flags list Miquel Raynal
2026-04-03 16:09 ` [PATCH v4 03/27] mtd: spi-nor: swp: Improve locking user experience Miquel Raynal
2026-04-03 16:09 ` [PATCH v4 04/27] mtd: spi-nor: Improve opcodes documentation Miquel Raynal
2026-04-03 16:09 ` [PATCH v4 05/27] mtd: spi-nor: debugfs: Align variable access with the rest of the file Miquel Raynal
2026-04-03 16:09 ` [PATCH v4 06/27] mtd: spi-nor: debugfs: Enhance output Miquel Raynal
2026-04-03 16:09 ` [PATCH v4 07/27] mtd: spi-nor: swp: Explain the MEMLOCK ioctl implementation behaviour Miquel Raynal
2026-05-05 15:40   ` Pratyush Yadav
2026-05-06  8:42     ` Miquel Raynal
2026-04-03 16:09 ` [PATCH v4 08/27] mtd: spi-nor: swp: Clarify a comment Miquel Raynal
2026-04-03 16:09 ` [PATCH v4 09/27] mtd: spi-nor: swp: Use a pointer for SR instead of a single byte Miquel Raynal
2026-04-03 16:09 ` [PATCH v4 10/27] mtd: spi-nor: swp: Create a helper that writes SR, CR and checks Miquel Raynal
2026-05-05 16:05   ` Pratyush Yadav
2026-05-06  8:57     ` Miquel Raynal
2026-05-06  9:06     ` Michael Walle
2026-05-06  9:54       ` Miquel Raynal [this message]
2026-04-03 16:09 ` [PATCH v4 11/27] mtd: spi-nor: swp: Rename a mask Miquel Raynal
2026-04-03 16:09 ` [PATCH v4 12/27] mtd: spi-nor: swp: Create a TB intermediate variable Miquel Raynal
2026-04-03 16:09 ` [PATCH v4 13/27] mtd: spi-nor: swp: Create helpers for building the SR register Miquel Raynal
2026-04-03 16:09 ` [PATCH v4 14/27] mtd: spi-nor: swp: Simplify checking the locked/unlocked range Miquel Raynal
2026-04-03 16:09 ` [PATCH v4 15/27] mtd: spi-nor: swp: Cosmetic changes Miquel Raynal
2026-04-03 16:09 ` [PATCH v4 16/27] mtd: spi-nor: Create a local SR cache Miquel Raynal
2026-05-05 16:14   ` Pratyush Yadav
2026-05-06  8:51     ` Michael Walle
2026-05-06  8:59       ` Miquel Raynal
2026-04-03 16:09 ` [PATCH v4 17/27] mtd: spi-nor: debugfs: Add locking support Miquel Raynal
2026-04-10  4:39   ` Takahiro.Kuwano
2026-04-27 13:39     ` Miquel Raynal
2026-04-27 16:11       ` Pratyush Yadav
2026-04-28  7:56         ` Miquel Raynal
2026-04-03 16:09 ` [PATCH v4 18/27] mtd: spi-nor: debugfs: Add a locked sectors map Miquel Raynal
2026-04-03 16:09 ` [PATCH v4 19/27] mtd: spi-nor: Add steps for testing locking support Miquel Raynal
2026-04-03 16:09 ` [PATCH v4 20/27] mtd: spi-nor: swp: Add support for the complement feature Miquel Raynal
2026-04-03 16:09 ` [PATCH v4 21/27] mtd: spi-nor: Add steps for testing locking with CMP Miquel Raynal
2026-04-03 16:09 ` [PATCH v4 22/27] mtd: spi-nor: winbond: Add W25H512NWxxAM CMP locking support Miquel Raynal
2026-04-03 16:09 ` [PATCH v4 23/27] mtd: spi-nor: winbond: Add W25H01NWxxAM " Miquel Raynal
2026-04-03 16:09 ` [PATCH v4 24/27] mtd: spi-nor: winbond: Add W25H02NWxxAM " Miquel Raynal
2026-04-03 16:09 ` [PATCH v4 25/27] mtd: spi-nor: winbond: Add W25H01NWxxIQ " Miquel Raynal
2026-04-03 16:09 ` [PATCH v4 26/27] mtd: spi-nor: winbond: Add W25Q01NWxxIM " Miquel Raynal
2026-04-03 16:09 ` [PATCH v4 27/27] mtd: spi-nor: winbond: Add W25Q02NWxxIM " Miquel Raynal

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