From: Takashi Iwai <tiwai@suse.de>
To: Mohan Kumar <mkumard@nvidia.com>
Cc: <tiwai@suse.com>, <perex@perex.cz>, <thierry.reding@gmail.com>,
<jonathanh@nvidia.com>, <linux-tegra@vger.kernel.org>,
<alsa-devel@alsa-project.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] ALSA: hda/tegra: Align BDL entry to 4KB boundary
Date: Tue, 06 Sep 2022 07:13:55 +0200 [thread overview]
Message-ID: <87czc9hyp8.wl-tiwai@suse.de> (raw)
In-Reply-To: <20220905172420.3801-1-mkumard@nvidia.com>
On Mon, 05 Sep 2022 19:24:20 +0200,
Mohan Kumar wrote:
>
> AZA HW may send a burst read/write request crossing 4K memory boundary.
> The 4KB boundary is not guaranteed by Tegra HDA HW. Make SW change to
> include the flag AZX_DCAPS_4K_BDLE_BOUNDARY to align BDLE to 4K
> boundary.
>
> Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Thanks, applied.
Takashi
prev parent reply other threads:[~2022-09-06 5:14 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-05 17:24 [PATCH] ALSA: hda/tegra: Align BDL entry to 4KB boundary Mohan Kumar
2022-09-06 5:13 ` Takashi Iwai [this message]
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