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[91.219.240.2]) by smtp.gmail.com with ESMTPSA id g1sm4191923wro.28.2020.03.22.06.37.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 22 Mar 2020 06:37:51 -0700 (PDT) From: Vitaly Kuznetsov To: Sean Christopherson Cc: Paolo Bonzini , Wanpeng Li , Jim Mattson , Joerg Roedel , kvm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 3/3] KVM: VMX: Gracefully handle faults on VMXON In-Reply-To: <20200321193751.24985-4-sean.j.christopherson@intel.com> References: <20200321193751.24985-1-sean.j.christopherson@intel.com> <20200321193751.24985-4-sean.j.christopherson@intel.com> Date: Sun, 22 Mar 2020 14:37:50 +0100 Message-ID: <87d094bjdd.fsf@vitty.brq.redhat.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Sean Christopherson writes: > Gracefully handle faults on VMXON, e.g. #GP due to VMX being disabled by > BIOS, instead of letting the fault crash the system. Now that KVM uses > cpufeatures to query support instead of reading MSR_IA32_FEAT_CTL > directly, it's possible for a bug in a different subsystem to cause KVM > to incorrectly attempt VMXON[*]. Crashing the system is especially > annoying if the system is configured such that hardware_enable() will > be triggered during boot. > > Oppurtunistically rename @addr to @vmxon_pointer and use a named param > to reference it in the inline assembly. > > Print 0xdeadbeef in the ultra-"rare" case that reading MSR_IA32_FEAT_CTL > also faults. > > [*] https://lkml.kernel.org/r/20200226231615.13664-1-sean.j.christopherson@intel.com > Signed-off-by: Sean Christopherson > --- > arch/x86/kvm/vmx/vmx.c | 24 +++++++++++++++++++++--- > 1 file changed, 21 insertions(+), 3 deletions(-) > > diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c > index 07634caa560d..3aba51d782e2 100644 > --- a/arch/x86/kvm/vmx/vmx.c > +++ b/arch/x86/kvm/vmx/vmx.c > @@ -2218,18 +2218,33 @@ static __init int vmx_disabled_by_bios(void) > !boot_cpu_has(X86_FEATURE_VMX); > } > > -static void kvm_cpu_vmxon(u64 addr) > +static int kvm_cpu_vmxon(u64 vmxon_pointer) > { > + u64 msr; > + > cr4_set_bits(X86_CR4_VMXE); > intel_pt_handle_vmx(1); > > - asm volatile ("vmxon %0" : : "m"(addr)); > + asm_volatile_goto("1: vmxon %[vmxon_pointer]\n\t" > + _ASM_EXTABLE(1b, %l[fault]) > + : : [vmxon_pointer] "m"(vmxon_pointer) > + : : fault); > + return 0; > + > +fault: > + WARN_ONCE(1, "VMXON faulted, MSR_IA32_FEAT_CTL (0x3a) = 0x%llx\n", > + rdmsrl_safe(MSR_IA32_FEAT_CTL, &msr) ? 0xdeadbeef : msr); We seem to be acting under an assumption that the fault is (likelt) caused my disabled VMX feature but afaics the fault can be caused by passing a bogus pointer too (but that would be a KVM bug, of course). > + intel_pt_handle_vmx(0); > + cr4_clear_bits(X86_CR4_VMXE); > + > + return -EFAULT; > } > > static int hardware_enable(void) > { > int cpu = raw_smp_processor_id(); > u64 phys_addr = __pa(per_cpu(vmxarea, cpu)); > + int r; > > if (cr4_read_shadow() & X86_CR4_VMXE) > return -EBUSY; > @@ -2246,7 +2261,10 @@ static int hardware_enable(void) > INIT_LIST_HEAD(&per_cpu(blocked_vcpu_on_cpu, cpu)); > spin_lock_init(&per_cpu(blocked_vcpu_on_cpu_lock, cpu)); > > - kvm_cpu_vmxon(phys_addr); > + r = kvm_cpu_vmxon(phys_addr); > + if (r) > + return r; > + > if (enable_ept) > ept_sync_global(); Reviewed-by: Vitaly Kuznetsov -- Vitaly