[PATCH v3 0/7] x86/kvm/hyperv: stable clocksorce for L2 guests when running nested KVM on Hyper-V

Vitaly Kuznetsov
2018-01-16T18:27:27Z

Changes since v2:
- Add Paolo's Acked-by to PATCH6-7
- Add Thomas' Reviewed-by to PATCH1
- Update the description of PATCH2 to match the reality [Thomas Gleixner]
- Add __visible and __irq_entry annotations to hyperv_reenlightenment_intr()
[Thomas Gleixner]
- Drop spinlock protection and use cpumask_any_but() in PATCH4
[Thomas Gleixner]

Original description:

Currently, KVM passes PVCLOCK_TSC_STABLE_BIT to its guests when running in
so called 'masterclock' mode and this is only possible when the clocksource
on the host is TSC. When running nested on Hyper-V we're using a different
clocksource in L1 (Hyper-V TSC Page) which can actually be used for
masterclock. This series brings the required support.

Making KVM work with TSC page clocksource is relatively easy, it is done in
PATCH 6 of the series. All the rest is required to support L1 migration
when TSC frequency changes, we use a special feature from Hyper-V to do
the job.

Vitaly Kuznetsov (7):
x86/hyper-v: check for required priviliges in hyperv_init()
x86/hyper-v: add a function to read both TSC and TSC page value
simulateneously
x86/hyper-v: reenlightenment notifications support
x86/hyper-v: redirect reenlightment notifications on CPU offlining
x86/irq: Count Hyper-V reenlightenment interrupts
x86/kvm: pass stable clocksource to guests when running nested on
Hyper-V
x86/kvm: support Hyper-V reenlightenment

arch/x86/entry/entry_32.S | 3 +
arch/x86/entry/entry_64.S | 3 +
arch/x86/hyperv/hv_init.c | 123 ++++++++++++++++++++++++++++++++-
arch/x86/include/asm/hardirq.h | 3 +
arch/x86/include/asm/irq_vectors.h | 7 +-
arch/x86/include/asm/mshyperv.h | 33 +++++++--
arch/x86/include/uapi/asm/hyperv.h | 27 ++++++++
arch/x86/kernel/cpu/mshyperv.c | 6 ++
arch/x86/kernel/irq.c | 9 +++
arch/x86/kvm/x86.c | 138 ++++++++++++++++++++++++++++++-------
10 files changed, 320 insertions(+), 32 deletions(-)

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2.14.3