From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753245AbdBNM1v (ORCPT ); Tue, 14 Feb 2017 07:27:51 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:43854 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752324AbdBNM1t (ORCPT ); Tue, 14 Feb 2017 07:27:49 -0500 From: "Aneesh Kumar K.V" To: Michael Ellerman , akpm@linux-foundation.org, Rik van Riel , Mel Gorman , paulus@ozlabs.org, benh@kernel.crashing.org Cc: linux-mm@kvack.org, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH V2 2/2] powerpc/mm/autonuma: Switch ppc64 to its own implementeation of saved write In-Reply-To: <87y3x9kp8e.fsf@concordia.ellerman.id.au> References: <1487050314-3892-1-git-send-email-aneesh.kumar@linux.vnet.ibm.com> <1487050314-3892-3-git-send-email-aneesh.kumar@linux.vnet.ibm.com> <87y3x9kp8e.fsf@concordia.ellerman.id.au> Date: Tue, 14 Feb 2017 17:56:44 +0530 MIME-Version: 1.0 Content-Type: text/plain X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 17021412-0048-0000-0000-000002055D4C X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17021412-0049-0000-0000-00004787A98A Message-Id: <87d1elufej.fsf@skywalker.in.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-02-14_08:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=1 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1612050000 definitions=main-1702140123 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Michael Ellerman writes: > "Aneesh Kumar K.V" writes: >> diff --git a/arch/powerpc/include/asm/book3s/64/mmu-hash.h b/arch/powerpc/include/asm/book3s/64/mmu-hash.h >> index 0735d5a8049f..8720a406bbbe 100644 >> --- a/arch/powerpc/include/asm/book3s/64/mmu-hash.h >> +++ b/arch/powerpc/include/asm/book3s/64/mmu-hash.h >> @@ -16,6 +16,9 @@ >> #include >> #include >> >> +#ifndef __ASSEMBLY__ >> +#include >> +#endif > > I assume that's for the VM_BUG_ON() you add below. But if so wouldn't > the #include be better placed in book3s/64/pgtable.h also? mmu-hash.h has got a hack that is explained below #ifndef __ASSEMBLY__ #include #endif /* * This is necessary to get the definition of PGTABLE_RANGE which we * need for various slices related matters. Note that this isn't the * complete pgtable.h but only a portion of it. */ #include This is the only place where we do that book3s/64/pgtable.h include this way. Everybody should include asm/pgable.h which picks the righ version based on different config option. # > >> diff --git a/arch/powerpc/include/asm/book3s/64/pgtable.h b/arch/powerpc/include/asm/book3s/64/pgtable.h >> index fef738229a68..c684ef6cbd10 100644 >> --- a/arch/powerpc/include/asm/book3s/64/pgtable.h >> +++ b/arch/powerpc/include/asm/book3s/64/pgtable.h >> @@ -512,6 +512,32 @@ static inline pte_t pte_mkhuge(pte_t pte) >> return pte; >> } >> >> +#define pte_mk_savedwrite pte_mk_savedwrite >> +static inline pte_t pte_mk_savedwrite(pte_t pte) >> +{ >> + /* >> + * Used by Autonuma subsystem to preserve the write bit >> + * while marking the pte PROT_NONE. Only allow this >> + * on PROT_NONE pte >> + */ >> + VM_BUG_ON((pte_raw(pte) & cpu_to_be64(_PAGE_PRESENT | _PAGE_RWX | _PAGE_PRIVILEGED)) != >> + cpu_to_be64(_PAGE_PRESENT | _PAGE_PRIVILEGED)); >> + return __pte(pte_val(pte) & ~_PAGE_PRIVILEGED); >> +} >> + > > > cheers -aneesh