From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935367AbcIGKac (ORCPT ); Wed, 7 Sep 2016 06:30:32 -0400 Received: from mga01.intel.com ([192.55.52.88]:64559 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934609AbcIGKaa (ORCPT ); Wed, 7 Sep 2016 06:30:30 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.30,296,1470726000"; d="asc'?scan'208";a="1052517364" From: Felipe Balbi To: Stefan Wahren , Greg Kroah-Hartman , linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, John Youn Cc: Michael Niewoehner , Tao Huang , Julius Werner , Caesar Wang , Stephen Warren , Doug Anderson , linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Heiko Stuebner , Kever Yang , Remi Pommarel Subject: Re: [RFT PATCH v4 0/3] usb: dwc2: Fix core reset and force mode delays In-Reply-To: <110609329.215940.91637ce0-69a6-4591-a597-b694e410dfca.open-xchange@email.1und1.de> References: <110609329.215940.91637ce0-69a6-4591-a597-b694e410dfca.open-xchange@email.1und1.de> User-Agent: Notmuch/0.22.1+63~g994277e (https://notmuchmail.org) Emacs/25.1.3 (x86_64-pc-linux-gnu) Date: Wed, 07 Sep 2016 13:29:54 +0300 Message-ID: <87d1kgknod.fsf@linux.intel.com> MIME-Version: 1.0 Content-Type: multipart/signed; boundary="=-=-="; micalg=pgp-sha256; protocol="application/pgp-signature" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --=-=-= Content-Type: text/plain Content-Transfer-Encoding: quoted-printable Hi, Stefan Wahren writes: > Hi John, > >> John Youn hat am 1. September 2016 um 23:07 >> geschrieben: >>=20 >>=20 >> This series accounts for the delay from the IDDIG debounce filter when >> switching modes. This delay is a function of the PHY clock speed and >> can range from 5-50 ms. This delay must be taken into account on core >> reset and force modes. A full explanation is provided in the patch >> commit log and code comments. >>=20 >> This revision of the series increases the IDDIG delay to 100 ms. Some >> rockchip platforms seem to timeout even with 50 ms so I have doubled >> this. >>=20 >> Appreciate any testing on RK3188 and RPi platforms. > > i tested the whole series successful with a Raspberry Pi B in dr_mode "ho= st" and > "otg" > > Tested-by: Stefan Wahren John, when you're happy with the series, please resend without RFT so I can apply :-) =2D-=20 balbi --=-=-= Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIcBAEBCAAGBQJXz+wiAAoJEMy+uJnhGpkGi7sQANtLV19kYSUv24/dHtOI+IHd GD8WQYEjC7lyA6K1WnU9EmpZKNxH9GkePeUAkYSaEaLjSMskmiYVaheyY7vJpCcK xkaJAH3YNDYzVSHByZNJJj2+ONgHvmhmzR9dkOv0NlU+g2fzZW8Ie7+C+i+IZ55E owQ8m1IKt3aAfoy1Q6yH8qMPur8T+r8+KP7o8oZXOxwImWEqu5IM8qlcr5dUYz10 XhKb03DKORUOXxzZLPsQmLz/Jc4jFSa/cTgFGflkO8GyJLBkLJPeBPhhnwb+EaIB 8F1LatrAibj86EOtIymsRMrar2wCEscPZzo5p1MVbhOZaxFF4r5gUD/Vjw1aW33m OcFsWbFxYqB1DcfjVB1xrUXh/FzcVJcO6UjfXkMIfpO+BStPPkxAIyfP65v3izum ldr+pS31sz0Ib3WgeJxbtmjswpoYA+xg8hTd7+T676WYm/O27nyfKpHNPnZaS/qs cY509ZUK+gkKgXLC7Z2M/1bpgofnSVxg+cQoed9e2qR1PysHDp8PmC40ZhCA2c2g q+QF3KOPXpwEQJV6vXR1BZYCzjnrwRfetCJ1iwMvFH+P8TnRlfyRVaEiGr03TkOD /QkN8TrYVZAMxsxbGmFEE1tWMa0/nKklTn9alO4K16Vs6SkVmgXDSmyr+Suhmi2m QVuvtSChQXV5UIUDvBVV =/Wqf -----END PGP SIGNATURE----- --=-=-=--