Re: [RFC PATCH 01/10] spi: spi-mem: Introduce support for tuning controller

Miquel Raynal
2025-09-10T08:08:21Z

On 14/08/2025 at 13:34:38 +01, Mark Brown <broonie@kernel.org> wrote:

> On Thu, Aug 14, 2025 at 05:04:33PM +0530, Santhosh Kumar K wrote:
>> On 14/08/25 01:56, Mark Brown wrote:
>
>> > Should we have something that blocks these tuning required modes without
>> > the appropriate tuning, and/or allows discovery of which modes require
>> > this tuning? This all feels very landmineish - client drivers just have
>> > to know when tuning is required.
>
>> The flash's maximum operating frequency determines whether PHY tuning is
>> required, as we need tuning in case of Cadence controller for frequencies
>> over 50 MHz.
>
> That's entirely specific to the Candence controller from the sounds of
> it, that makes it hard to write a client driver if you need to know
> exactly what the controller you're dealing with is and what it's
> requirements are.
>
>> And we do check for this condition - see Patch 07/10,
>> cqspi_phy_op_eligible_sdr(), which currently verifies the flash frequency
>> against 166 MHz. This logic can be improved by implementing both min and max
>> frequency checks, will update in the following version.
>
> I can't actually tell how that verifies if the tuning has been done
> appropriately TBH, at least not without more effort than I'd care to
> (and the tuning only gets added in patch 10?).

Santhosh, do you need more inputs? Or can you send an updated version?

I am still thinking about the interface on the spi-mem/spi-nand side,
but please iterate so we can move forward.

Thanks,
Miquèl