From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 16D231A76C1 for ; Thu, 15 Aug 2024 15:14:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723734889; cv=none; b=WT3jEOImFzVJhtW2dv+P0ke+Gq4fOfBVhGBbhoR6415YrW/ksZxkE/pfAf09bPWhWjvHrLYg/DiL7e99mSsTaS63/PZIO9vOqjuYKFUw1WtopMDLxjFtlxZRtxJ4XuHRIQuLkHDBn2gqq0MvoQruFmzK7DQJ8RiF+W1y/HAyv64= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723734889; c=relaxed/simple; bh=OkyHwXozf3/6w8P3MZbh7aenxKvTlvIn7PY84HsAdy4=; h=From:To:Cc:Subject:In-Reply-To:References:Date:Message-ID: MIME-Version:Content-Type; b=qS872Rl3LdVdFb2WbGsJ/aqsteZ39LeNuRa24dZHYNFqi9Q2gtULC0eWL9wgNiwo8C8regGa3op8dNFPmVt7YikJcDuh32xTMTO3owkf8VjJ+4I7Mq68uuqh9u9C+xzkvqBopeBdduQvSwFDgIdbSYy0iddJ8ETqG5V6hRNQOgg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=IeuYPepv; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=/lnCCE5Z; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="IeuYPepv"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="/lnCCE5Z" From: Thomas Gleixner DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1723734886; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=BPuHrZFx778hIDCBjTHxN+nZoZJhuNLfJ7MygK5qf7s=; b=IeuYPepvPZJ9b1rhkQ533WHtEU3evyQekNsqApqteeceqLiw0RQuiRauBDeOWbo2IO5yS5 wl+/NZ8uL6319HJxMJwKIz8IrbG3di0eNXj6r2zBwg/dUml/GeYb1KVXBOsuoiLZ1zefCq TSPkuXmbpC6J/v3gAlDPaIm5qfQF/P4yz0xOTacuXk18hEGvmv7pZXnQdNcVZQOdQh2cMI wz/XddR14znnDNYufDjhznkECv3Co8LEBd0zJCEHrMPbNqlRQthISCUBiAGCOjSHJR73Ia mnP057QIsVRjDejSdqxoudG3+/3J/atbprE+btzkFxb/X+X/sX851k6Xl6yprA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1723734886; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=BPuHrZFx778hIDCBjTHxN+nZoZJhuNLfJ7MygK5qf7s=; b=/lnCCE5ZkYhDXIuRucYB2dv8d9MiH4kcasDEWTtt2b76j+ZHQy+ADQAsdCliqQTV9jX5jY 0lsPltapscHbWrBg== To: Samuel Holland , Anup Patel , Emil Renner Berthing Cc: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Paul Walmsley , Palmer Dabbelt , Albert Ou , Daniel Lezcano Subject: Re: [PATCH v1 0/9] Fix Allwinner D1 boot regression In-Reply-To: References: <20240814145642.344485-1-emil.renner.berthing@canonical.com> <87jzgjnh9z.ffs@tglx> <87ttfmm2ns.ffs@tglx> <87plqalyd4.ffs@tglx> <686d61c4-e7ac-4dca-a7fd-decdd72e84d9@sifive.com> <87h6blnaf1.ffs@tglx> Date: Thu, 15 Aug 2024 17:14:45 +0200 Message-ID: <87ed6pn7h6.ffs@tglx> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain On Thu, Aug 15 2024 at 09:41, Samuel Holland wrote: > On 2024-08-15 9:16 AM, Anup Patel wrote: >> Almost all RISC-V platforms (except this one) have SBI Timer always >> available and Linux uses a better timer or Sstc extension whenever >> it is available. > > So this is the immediate solution: add the CLINT to the firmware > devicetree so that the SBI time extension works, and Linux will boot > without any code changes, albeit with a higher-overhead clockevent > device. That does not matter for the boot process when the sun4i timer becomes available afterwards. But how can this be retrofitted along with the kernel update? Thanks, tglx