[PATCH 3/5] clk: sunxi-ng: nm: Support constraints on n/m ratio and parent rate

Frank Oltmanns
2023-12-18T13:41:49Z

The Allwinner A64 manual lists the following constraint for the
PLL-VIDEO0 clock: 8 <= N/M <= 25

The PLL-MIPI clock is implemented as ccu_nm. Therefore, add support for
this constraint.

Signed-off-by: Frank Oltmanns <frank@oltmanns.dev>
---
drivers/clk/sunxi-ng/ccu_nm.c | 21 +++++++++++++++++++--
drivers/clk/sunxi-ng/ccu_nm.h | 34 ++++++++++++++++++++++++++++++++--
2 files changed, 51 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/sunxi-ng/ccu_nm.c b/drivers/clk/sunxi-ng/ccu_nm.c
index ffac3deb89d6..cfc6981e398b 100644
--- a/drivers/clk/sunxi-ng/ccu_nm.c
+++ b/drivers/clk/sunxi-ng/ccu_nm.c
@@ -27,6 +27,19 @@ static unsigned long ccu_nm_calc_rate(unsigned long parent,
return rate;
}

+static bool ccu_nm_is_valid_rate(struct ccu_common *common, unsigned long n, unsigned long m)
+{
+ struct ccu_nm *nm = container_of(common, struct ccu_nm, common);
+
+ if (nm->max_nm_ratio && (n > nm->max_nm_ratio * m))
+ return false;
+
+ if (nm->min_nm_ratio && (n < nm->min_nm_ratio * m))
+ return false;
+
+ return true;
+}
+
static unsigned long ccu_nm_find_best(struct ccu_common *common, unsigned long parent,
unsigned long rate, struct _ccu_nm *nm)
{
@@ -36,8 +49,12 @@ static unsigned long ccu_nm_find_best(struct ccu_common *common, unsigned long p

for (_n = nm->min_n; _n <= nm->max_n; _n++) {
for (_m = nm->min_m; _m <= nm->max_m; _m++) {
- unsigned long tmp_rate = ccu_nm_calc_rate(parent,
- _n, _m);
+ unsigned long tmp_rate;
+
+ if (!ccu_nm_is_valid_rate(common, _n, _m))
+ continue;
+
+ tmp_rate = ccu_nm_calc_rate(parent, _n, _m);

if (ccu_is_better_rate(common, rate, tmp_rate, best_rate)) {
best_rate = tmp_rate;
diff --git a/drivers/clk/sunxi-ng/ccu_nm.h b/drivers/clk/sunxi-ng/ccu_nm.h
index 93c11693574f..0075df6d9697 100644
--- a/drivers/clk/sunxi-ng/ccu_nm.h
+++ b/drivers/clk/sunxi-ng/ccu_nm.h
@@ -31,6 +31,8 @@ struct ccu_nm {
unsigned int fixed_post_div;
unsigned int min_rate;
unsigned int max_rate;
+ unsigned long min_nm_ratio; /* minimum value for m/n */
+ unsigned long max_nm_ratio; /* maximum value for m/n */

struct ccu_common common;
};
@@ -108,7 +110,8 @@ struct ccu_nm {
}, \
}

-#define SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN_MAX_FEAT(_struct, _name, \
+#define SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN_MAX_FEAT_NM_RATIO( \
+ _struct, _name, \
_parent, _reg, \
_min_rate, _max_rate, \
_nshift, _nwidth, \
@@ -117,7 +120,9 @@ struct ccu_nm {
_frac_rate_0, \
_frac_rate_1, \
_gate, _lock, _flags, \
- _features) \
+ _features, \
+ _min_nm_ratio, \
+ _max_nm_ratio) \
struct ccu_nm _struct = { \
.enable = _gate, \
.lock = _lock, \
@@ -128,6 +133,8 @@ struct ccu_nm {
_frac_rate_1), \
.min_rate = _min_rate, \
.max_rate = _max_rate, \
+ .min_nm_ratio = _min_nm_ratio, \
+ .max_nm_ratio = _max_nm_ratio, \
.common = { \
.reg = _reg, \
.features = _features, \
@@ -138,6 +145,29 @@ struct ccu_nm {
}, \
}

+#define SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN_MAX_FEAT(_struct, _name, \
+ _parent, _reg, \
+ _min_rate, _max_rate, \
+ _nshift, _nwidth, \
+ _mshift, _mwidth, \
+ _frac_en, _frac_sel, \
+ _frac_rate_0, \
+ _frac_rate_1, \
+ _gate, _lock, _flags, \
+ _features) \
+ SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN_MAX_FEAT_NM_RATIO( \
+ _struct, _name, \
+ _parent, _reg, \
+ _min_rate, _max_rate, \
+ _nshift, _nwidth, \
+ _mshift, _mwidth, \
+ _frac_en, _frac_sel, \
+ _frac_rate_0, \
+ _frac_rate_1, \
+ _gate, _lock, _flags, \
+ _features, \
+ 0, 0)
+
#define SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN_MAX(_struct, _name, \
_parent, _reg, \
_min_rate, _max_rate, \

--
2.43.0