From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9D25FC433EF for ; Mon, 7 Mar 2022 11:35:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238702AbiCGLg0 (ORCPT ); Mon, 7 Mar 2022 06:36:26 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41864 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237562AbiCGLgY (ORCPT ); Mon, 7 Mar 2022 06:36:24 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 921B346B28; Mon, 7 Mar 2022 03:35:29 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 429BDB81110; Mon, 7 Mar 2022 11:35:28 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 03E3BC340E9; Mon, 7 Mar 2022 11:35:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1646652927; bh=XesjCGCYyHWHzaubvKO2gJQuUaId9Ngm3lB1IF+KmP4=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=clkaUN2BKYGX0SNVJU44XC8FxDV/cz4zZ4z3w0WKRSDu0jKuujVggjzG+02suY4Eq xRUPaSDLPTVKM1Ot1/zFbrd36et2UuIqxtfHqsnnSaJsPtotJOyol4pvt3GJ8VaXrd 7N0k1BdQCkbUPTO6pKB1UjpWWrMR9891+z3RIQgwzB4pRZIx+7ycPesVH2zbr2YlXd x7KvZlAaZe5QzZkTMirmMjZN5A8yu0xryZxmhuD7GLbHWJLG+Q8Uf+B2wPu27HOsIl OVesmbIeJdwm+iPNp59GdiQ6R0m60+jUA1spry7WDBowaLWjWgRrBRCyCzQD1ATf8e u0eXGri4KT5bA== Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1nRBe8-00ClcT-Uj; Mon, 07 Mar 2022 11:35:25 +0000 Date: Mon, 07 Mar 2022 11:35:24 +0000 Message-ID: <87ee3e0zcz.wl-maz@kernel.org> From: Marc Zyngier To: Hector Martin Cc: Rob Herring , Thomas Gleixner , Sven Peter , Alyssa Rosenzweig , Mark Kettenis , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v2 2/7] dt-bindings: interrupt-controller: apple,aic2: New binding for AICv2 In-Reply-To: <67171c2a-7601-6dfb-92b3-24c1ca971995@marcan.st> References: <20220224130741.63924-1-marcan@marcan.st> <20220224130741.63924-3-marcan@marcan.st> <67171c2a-7601-6dfb-92b3-24c1ca971995@marcan.st> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: marcan@marcan.st, robh@kernel.org, tglx@linutronix.de, sven@svenpeter.dev, alyssa@rosenzweig.io, mark.kettenis@xs4all.nl, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 25 Feb 2022 21:58:34 +0000, Hector Martin wrote: > > On 26/02/2022 05.19, Rob Herring wrote: > >> +properties: > >> + compatible: > >> + items: > >> + - const: apple,t6000-aic > >> + - const: apple,aic2 > > > > I feel I was sold on Apple doesn't change h/w and we're the 2nd chip in > > and the h/w changed. Just my musings, but aic3 will be rejected. :( > > Well yes, after not changing hardware for N phone/tablet generations, > they figured out they *finally* had to make some changes for real > desktop chips... (t8103 was a tablet chip they shoehorned into laptops; > t6000 is the first real laptop/desktop chip). This isn't the 2nd chip > in, this is the 26th chip in or so, and yet it's called AIC2 (by Apple > even)... We aren't starting from chip #1, just the first chip they > decided to *let* us put Linux on. > > It's pretty clear that the t6000 changes were made with future-proofing > in mind. I guess we'll find out in a couple weeks, since the rumor mill > says M2 is coming. If I'm right and we end up needing *zero* kernel > changes to boot on M2, will you be happy? ;-) > > >> + apple,event-reg: > >> + $ref: /schemas/types.yaml#/definitions/uint32 > >> + description: > >> + Specifies the offset of the event register, which lies after all the > >> + implemented die register sets, page aligned. This is not computable from > >> + capability register values, so we have to specify it explicitly. > > > > If this is last, then couldn't it be a 2nd 'reg' entry? > > > > 'page aligned' is ambiguous. I assume that means 16K since that's what > > Apple uses, but I might assume 4K not knowing that. > > 16K, and yeah, it could be a 2nd reg entry if you think that works > better. Makes sense. Do you plan to respin this? If I'm going to that this series for 5.18, it needs to be this week. Thanks, M. -- Without deviation from the norm, progress is not possible.