Re: [PATCH v3 1/5] x86/mm: change l1d flush runtime prctl behaviour

Singh, Balbir
2020-12-04T22:45:40Z

On Fri, 2020-12-04 at 22:07 +0100, Thomas Gleixner wrote:
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> On Fri, Nov 27 2020 at 17:59, Balbir Singh wrote:
>
> > Detection of task affinities at API opt-in time is not the best
> > approach, the approach is to kill the task if it runs on a
> > SMT enable core. This is better than not flushing the L1D cache
> > when the task switches from a non-SMT core to an SMT enabled core.
> >
> > Signed-off-by: Balbir Singh <sblbir@amazon.com>
> > ---
> > arch/x86/include/asm/processor.h | 2 ++
> > arch/x86/kernel/smpboot.c | 11 ++++++++++-
> > 2 files changed, 12 insertions(+), 1 deletion(-)
>
> Subject, changelog match but patch content not so much :)
>

The changelog jumped between 1/3 of my fixup and 1/5 of my
new post :)

The correct changelog is below, which I shall fix

x86/smp: Add a per-cpu view of SMT state

A new field smt_active in cpuinfo_x86 identifies if the current core/cpu
is in SMT mode or not. This can be very helpful if the system has some
of its cores with threads offlined and can be used for cases where
action is taken based on the state of SMT. The follow up patches use
this feature.

Suggested-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Balbir Singh <sblbir@amazon.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/20200729001103.6450-2-sblbir@amazon.com
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