Re: [patch v2 21/30] x86/cpu/topology: Use topology bitmaps for sizing

[Thomas Gleixner <tglx@linutronix.de>]

On Fri, Jan 26 2024 at 07:07, Zhang, Rui wrote:
>> >  
>> > +       cnta = domain_weight(TOPO_PKG_DOMAIN);
>> > +       cntb = domain_weight(TOPO_DIE_DOMAIN);
>> > +       __max_logical_packages = cnta;
>> > +       __max_dies_per_package = 1U << (get_count_order(cntb) - >
>> > get_count_order(cnta));
>> > +
>> > +       pr_info("Max. logical packages: %3u\n", cnta);
>> > +       pr_info("Max. logical dies:     %3u\n", cntb);
>> > +       pr_info("Max. dies per package: %3u\n", >
>> > __max_dies_per_package);
>> > +
>> > +       cnta = domain_weight(TOPO_CORE_DOMAIN);
>> > +       cntb = domain_weight(TOPO_SMT_DOMAIN);
>> > +       smp_num_siblings = 1U << (get_count_order(cntb) - >
>> > get_count_order(cnta));
>> > +       pr_info("Max. threads per core: %3u\n", smp_num_siblings);
>> > +
>
> I missed this but Ashok catches it.
>
> Say, on my Adlerlake platform, which has 4 Pcores with HT + 8 Ecores,
> cnta is 12, cntb is 16, and smp_num_siblings is set to 1 erroneously.
>
> I think we should use
> 	smp_num_siblings = DIV_ROUND_UP(cntb, cnta);
> here.

Indeed. That's more than obvious.

> Or even check each core to get the maximum value (in case there are
> more than 2 siblings in a core some day).

We want to get rid of HT not make it worse.