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bh=841xmotN080Gj8mdI3q/cuaEGS+WUt6XWaaj98SJfC0=; b=oStABYS2G2zTv+ODpU8P2xgVD0mZAmsxS4qF+kxGGJjfABa9k0xyZzjsZkuUiqISWJAS6F BGKw6BV2kfvKA85ploNHoWYE5F3gLoWtSFtLaZmJXKum1elDqQIJRKcPqeNBdDWYGjyrGu XgxCJS69C3D2AG9f2npYQ5Hn9TlxlEC5hFvPyrU4DsD36XD8DWX9kmJv8AQ3NrK2qo4I4p rchfG2EN3e8uTpNrwifBcXzZnhTDB+P3ijLqivtm1KX5RkDXopt+dxmwlzIALDHAm02IH+ 7dE6mqum2XDZ60UApKFMcvROvw6zmu7JO/nIbCvu24UxhWZ6sblAUS1APAcPww== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1706300568; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=841xmotN080Gj8mdI3q/cuaEGS+WUt6XWaaj98SJfC0=; b=e/Sdjn69Gp/hEaJQ2kx627HStGPFxqq/vH2MJX8/rj8yPCZ2BblOJqJ49Oax65On4CCyTX Cs9s/ns5acKe1GDw== To: "Zhang, Rui" , "linux-kernel@vger.kernel.org" Cc: "Raj, Ashok" , "mhklinux@outlook.com" , "arjan@linux.intel.com" , "ray.huang@amd.com" , "thomas.lendacky@amd.com" , "andrew.cooper3@citrix.com" , "Sivanich, Dimitri" , "Tang, Feng" , "kan.liang@linux.intel.com" , "Mehta, Sohil" , "peterz@infradead.org" , "paulmck@kernel.org" , "kprateek.nayak@amd.com" , "jgross@suse.com" , "andy@infradead.org" , "x86@kernel.org" Subject: Re: [patch v2 21/30] x86/cpu/topology: Use topology bitmaps for sizing In-Reply-To: <7c8874d971c69fb4c22c1b771983f8d5109a9387.camel@intel.com> References: <20240118123127.055361964@linutronix.de> <20240118123649.739960607@linutronix.de> <7c8874d971c69fb4c22c1b771983f8d5109a9387.camel@intel.com> Date: Fri, 26 Jan 2024 21:22:47 +0100 Message-ID: <87fryjhmjs.ffs@tglx> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On Fri, Jan 26 2024 at 07:07, Zhang, Rui wrote: >> > =C2=A0 >> > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0cnta =3D domain_weight(TOPO= _PKG_DOMAIN); >> > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0cntb =3D domain_weight(TOPO= _DIE_DOMAIN); >> > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0__max_logical_packages =3D = cnta; >> > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0__max_dies_per_package =3D = 1U << (get_count_order(cntb) - > >> > get_count_order(cnta)); >> > + >> > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0pr_info("Max. logical packa= ges: %3u\n", cnta); >> > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0pr_info("Max. logical dies:= =C2=A0=C2=A0=C2=A0=C2=A0 %3u\n", cntb); >> > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0pr_info("Max. dies per pack= age: %3u\n", > >> > __max_dies_per_package); >> > + >> > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0cnta =3D domain_weight(TOPO= _CORE_DOMAIN); >> > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0cntb =3D domain_weight(TOPO= _SMT_DOMAIN); >> > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0smp_num_siblings =3D 1U << = (get_count_order(cntb) - > >> > get_count_order(cnta)); >> > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0pr_info("Max. threads per c= ore: %3u\n", smp_num_siblings); >> > + > > I missed this but Ashok catches it. > > Say, on my Adlerlake platform, which has 4 Pcores with HT + 8 Ecores, > cnta is 12, cntb is 16, and smp_num_siblings is set to 1 erroneously. > > I think we should use > smp_num_siblings =3D DIV_ROUND_UP(cntb, cnta); > here. Indeed. That's more than obvious. > Or even check each core to get the maximum value (in case there are > more than 2 siblings in a core some day). We want to get rid of HT not make it worse.