Re: [RESEND RFC: timer passthrough 0/9] Support timer passthrough for VM

Paolo Bonzini
2021-02-05T13:41:12Z

On 05/02/21 11:03, Zhimin Feng wrote:
> The main motivation for this patch is to improve the performance of VM.
> This patch series introduces how to enable the timer passthrough in
> non-root mode.
>
> The main idea is to offload the host timer to the preemtion timer in
> non-root mode. Through doing this, guest can write tscdeadline msr directly
> in non-root mode and host timer isn't lost. If CPU is in root mode,
> guest timer is switched to software timer.
>
> Testing on Intel(R) Xeon(R) Platinum 8260 server.
>
> The guest OS is Debian(kernel: 4.19.28). The specific configuration is
> is as follows: 8 cpu, 16GB memory, guest idle=poll
> memcached in guest(memcached -d -t 8 -u root)
>
> I use the memtier_benchmark tool to test performance
> (memtier_benchmark -P memcache_text -s guest_ip -c 16 -t 32
> --key-maximum=10000000000 --random-data --data-size-range=64-128 -p 11211
> --generate-keys --ratio 5:1 --test-time=500)
>
> Total Ops can be improved 25% and Avg.Latency can be improved 20% when
> the timer-passthrough is enabled.

As Peter noticed, this is very invasive. Perhaps you could try
organizing the code like this:

1) just for the sake of these patches, completely disable the usage of
the preemption timer

2) add a module parameter that:

- reads the TSC deadline MSR on vmentry and uses it to program the VMX
preemption timer

- disables the host APIC timer while the guest runs

- injects a timer interrupt on preemption timer vmexits

3) also if the module parameter is 1, use the MSR autoload feature to
use TSC_ADJUST instead of the VMCS TSC offset

4) also if the module parameter is 1 reintroduce the hv_timer callbacks,
but this time to program the TSC deadline timer via MSR autoload

5) only when everything else is in place, figure out how to avoid the
RDMSR for the TSC deadline MSR.

Thanks,

Paolo