Re: [patch 20/48] x86/apic: Enable TSC coupled programming mode

[Thomas Gleixner <tglx@kernel.org>]

On Tue, Mar 03 2026 at 14:30, Nathan Chancellor wrote:
> No problem and thanks for the explanation! Unfortunately, in further
> testing, that diff appears to break booting my two AMD test systems,
> which had no problems with the current series. The output from that
> previous dmesg command from both systems on a vanilla next-20260303:
>
>   [    0.000000] tsc: Fast TSC calibration using PIT
>   [    0.000000] tsc: Detected 3792.761 MHz processor
>   [    0.061853] clocksource: tsc-early: mask: 0xffffffffffffffff max_cycles: 0x6d574392f2f, max_idle_ns: 881590904565 ns
>   [    0.332910] clocksource: Switched to clocksource tsc-early
>   [    1.368506] tsc: Refined TSC clocksource calibration: 3792.899 MHz
>   [    1.368521] clocksource: tsc: mask: 0xffffffffffffffff max_cycles: 0x6d584a46b0d, max_idle_ns: 881590977212 ns
>   [    1.368849] clocksource: Switched to clocksource tsc
>   [    4.497901] kvm_amd: TSC scaling supported
>
>   [    0.000000] tsc: Fast TSC calibration using PIT
>   [    0.000000] tsc: Detected 2994.309 MHz processor
>   [    0.179828] clocksource: tsc-early: mask: 0xffffffffffffffff max_cycles: 0x2b29459826f, max_idle_ns: 440795319985 ns
>   [    0.452947] clocksource: Switched to clocksource tsc-early
>   [    1.485796] tsc: Refined TSC clocksource calibration: 2994.372 MHz
>   [    1.485810] clocksource: tsc: mask: 0xffffffffffffffff max_cycles: 0x2b29812ce43, max_idle_ns: 440795323173 ns
>   [    1.486231] clocksource: Switched to clocksource tsc
>   [    7.870821] kvm_amd: TSC scaling supported

Borislav has observed that too. I send out a fix in a minute.

Thanks,

        tglx