From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B19713594B for ; Tue, 2 Sep 2025 13:48:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756820888; cv=none; b=qmQQrGrFsrIY7Ei6w/BU6b6BjgPRb2IxymQuoxev8zejwFAcgkopFSAw6Iz166uUlv0REpuuQpUL4dNk/nA08eh11/wWHybRy1awQiLX/eAhe/25LGI1lNeE1b/fSeTE1P70HjZ/4CR3VtWoZGNibV66QLdhbiNOVM0Zoy0vE7k= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756820888; c=relaxed/simple; bh=3n/KFfbN7HctPn0qF4RPJk37oP0xleQ1a71VoTgTufc=; h=From:To:Cc:Subject:In-Reply-To:References:Date:Message-ID: MIME-Version:Content-Type; b=ehc2XJJY7GGanUYKcsJ9iEVHI9Pfio/oBe0xz4U3x6+oNG3H5It9Gra813z/y6kct1wdX7MEAZA/N+oti+GaC92p2HOtWmkKzuG0bQCv3WV7sZAG4iuMEJxDdPPzifiw4ncGFXepwnpwKIUNTLt1nSbWKTAQGMSyt9w6TQszm8k= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=LE6a9p2D; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=sdkuGTta; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="LE6a9p2D"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="sdkuGTta" From: Thomas Gleixner DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1756820885; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=2Qd7xDqLySecXV+gmEJeBhSsP1AFEufVROlwZ2/SczI=; b=LE6a9p2D7l24Nq58tMlqS+CseZZSqH55fjwAwk5Kd7mwsliNuIGCztMgUGoTwVamhbojd2 9Qa8yFjSSFu5HZuNdbSa8BcOQcS1X+emQBaoY06XsDGXmKwH9Cvc32j36XF+SOhaTsr638 /O/bV+j0XDsRENvWmluWs7f2PtvIQAGEdMnoAW9t25fG1EKAcKlj8oC8pSMazL21+9QQB4 BWW0NgGFv4ywRkUFpXl5hNfSPMDiBllovfCv5Dto6TRggQZfIQHkobT2rSfLN8DuQXsx2i cptwyexu7U3X//SVuRHx70m2iAIDCeb6dhzcJrN2kfjv5UiKWWtcKB3Dfz6Aqw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1756820885; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=2Qd7xDqLySecXV+gmEJeBhSsP1AFEufVROlwZ2/SczI=; b=sdkuGTtaUXNY09bNY3LQcmWKKWjBxmzl+BUWsq89F21/uv/1mVJQmVWmjOYrvZqrXOXEbi b4Ca2Lh/OopmDgCw== To: Mathieu Desnoyers , LKML Cc: Jens Axboe , Peter Zijlstra , "Paul E. McKenney" , Boqun Feng , Paolo Bonzini , Sean Christopherson , Wei Liu , Dexuan Cui , x86@kernel.org, Arnd Bergmann , Heiko Carstens , Christian Borntraeger , Sven Schnelle , Huacai Chen , Paul Walmsley , Palmer Dabbelt Subject: Re: [patch V2 14/37] rseq: Cache CPU ID and MM CID values In-Reply-To: <130e2d99-6c8f-471e-9a72-d858431741ee@efficios.com> References: <20250823161326.635281786@linutronix.de> <20250823161654.164761547@linutronix.de> <130e2d99-6c8f-471e-9a72-d858431741ee@efficios.com> Date: Tue, 02 Sep 2025 15:48:02 +0200 Message-ID: <87h5xl0xv1.ffs@tglx> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain On Mon, Aug 25 2025 at 14:19, Mathieu Desnoyers wrote: > On 2025-08-23 12:39, Thomas Gleixner wrote: >> In preparation for rewriting RSEQ exit to user space handling provide >> storage to cache the CPU ID and MM CID values which were written to user >> space. That prepares for a quick check, which avoids the update when >> nothing changed. > > What should we do about the numa node_id field ? > > On pretty much all arch except powerpc (AFAIK) it's invariant for > the topology, so derived from cpu_id. > > On powerpc, we could perhaps reset the cached cpu_id to ~0U for > each thread to trigger an update ? Or just don't care about this ? It's invariant on powerPC as well after the CPU was [hot]added to the kernel. Otherwise any usage of cpu_to_node() would be broken on powerPC, no? Thanks, tglx