From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2CB5DE743FE for ; Fri, 29 Sep 2023 09:24:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232915AbjI2JYC (ORCPT ); Fri, 29 Sep 2023 05:24:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58850 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231774AbjI2JYA (ORCPT ); Fri, 29 Sep 2023 05:24:00 -0400 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 84B4E195 for ; Fri, 29 Sep 2023 02:23:58 -0700 (PDT) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1C499C433C8; Fri, 29 Sep 2023 09:23:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1695979438; bh=QecFZbeAzr1CUj1OPKHsPsEg7gSJ5EihrrYlTpFlMbI=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=u+6w+2oo5XFnb1UTRpG9dHyJSRqqHYjtrGMU9i8qjgeVeQ+zRjIr3wlRj/3ZQFCLA oMUR6yatFLC1puWfMi5iyy6SJpE9Ic1UUlb+/DK8grRrMhtnnUgx1B1bezmiQnhFeX b3+dt18EZ26AEtU9i/JWOUQ/5HeNx0e+4bmv+3MlRqCUX050rN4rruLp101ebeWxzU IX1vNSezAOWSJC8IWTQ0nBNPbwOOudxiG5q3UU/cbsKEm7Lh00y5MR4mO6wyxANvHW bCGcFwj8DtLqeQ552SUSria/pGIIocV8HfK4eopDXalliouOL9s4GAuWHn+f7ZjaHQ EVOKPILgo5iRQ== Received: from [85.255.233.37] (helo=wait-a-minute.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1qm9j1-00HCbM-N5; Fri, 29 Sep 2023 10:23:55 +0100 Date: Fri, 29 Sep 2023 10:23:54 +0100 Message-ID: <87h6ndmixh.wl-maz@kernel.org> From: Marc Zyngier To: Oliver Upton Cc: Kristina Martsenko , kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, James Morse , Suzuki K Poulose , Zenghui Yu , Catalin Marinas , Will Deacon , Vladimir Murzin , Colton Lewis , linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 1/2] KVM: arm64: Add handler for MOPS exceptions In-Reply-To: References: <20230922112508.1774352-1-kristina.martsenko@arm.com> <20230922112508.1774352-2-kristina.martsenko@arm.com> <87sf734ofv.wl-maz@kernel.org> <9f731870-ed36-d2e4-378b-f7fbf338ebd6@arm.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 85.255.233.37 X-SA-Exim-Rcpt-To: oliver.upton@linux.dev, kristina.martsenko@arm.com, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, james.morse@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, catalin.marinas@arm.com, will@kernel.org, vladimir.murzin@arm.com, coltonlewis@google.com, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 27 Sep 2023 09:28:20 +0100, Oliver Upton wrote: > > On Mon, Sep 25, 2023 at 04:16:06PM +0100, Kristina Martsenko wrote: > > [...] > > > > What is the rationale for advancing the state machine? Shouldn't we > > > instead return to the guest and immediately get the SS exception, > > > which in turn gets reported to userspace? Is it because we rollback > > > the PC to a previous instruction? > > > > Yes, because we rollback the PC to the prologue instruction. We advance the > > state machine so that the SS exception is taken immediately upon returning to > > the guest at the prologue instruction. If we didn't advance it then we would > > return to the guest, execute the prologue instruction, and then take the SS > > exception on the middle instruction. Which would be surprising as userspace > > would see the middle and epilogue instructions executed multiple times but not > > the prologue. > > I agree with Kristina that taking the SS exception on the prologue is > likely the best course of action. Especially since it matches the > behavior of single-stepping an EL0 MOPS sequence with an intervening CPU > migration. > > This behavior might throw an EL1 that single-steps itself for a loop, > but I think it is impossible for a hypervisor to hide the consequences > of vCPU migration with MOPS in the first place. > > Marc, I'm guessing you were most concerned about the former case where > the VMM was debugging the guest. Is there something you're concerned > about I missed? My concern is not only the VMM, but any userspace that perform single-stepping. Imagine the debugger tracks PC by itself, and simply increments it by 4 on a non-branch, non-fault instruction. Move the vcpu or the userspace around, rewind PC, and now the debugger is out of whack with what is executing. While I agree that there is not much a hypervisor can do about that, I'm a bit worried that we are going to break existing SW with this. Now the obvious solution is "don't do that"... M. -- Without deviation from the norm, progress is not possible.