From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758170AbcG1NPz (ORCPT ); Thu, 28 Jul 2016 09:15:55 -0400 Received: from down.free-electrons.com ([37.187.137.238]:53426 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1757748AbcG1NPs (ORCPT ); Thu, 28 Jul 2016 09:15:48 -0400 From: Gregory CLEMENT To: Grzegorz Jaszczyk Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, robh+dt@kernel.org, mark.rutland@arm.com, jason@lakedaemon.net, andrew@lunn.ch, sebastian.hesselbarth@gmail.com, linux@armlinux.org.uk, thomas.petazzoni@free-electrons.com, mw@semihalf.com, alior@marvell.com Subject: Re: [PATCH 18/18] ARM: mvebu: a395-gp: add support for the Armada 395 GP Board References: <1469105055-25181-1-git-send-email-jaz@semihalf.com> <1469105055-25181-20-git-send-email-jaz@semihalf.com> Date: Thu, 28 Jul 2016 15:15:46 +0200 In-Reply-To: <1469105055-25181-20-git-send-email-jaz@semihalf.com> (Grzegorz Jaszczyk's message of "Thu, 21 Jul 2016 14:44:15 +0200") Message-ID: <87h9b9kinx.fsf@free-electrons.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.5 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Grzegorz, On jeu., juil. 21 2016, Grzegorz Jaszczyk wrote: Change the prefix to "ARM: dts: mvebu: armada-395-gp:" > This commit adds description for the following features for this board: > > - Serial port > - PCIe interfaces > - USB2.0 > - USB3.0 > - SDIO > - 1024 MiB NAND-FLASH > - SATA > - I2C buses > > Signed-off-by: Grzegorz Jaszczyk [...] As for the other board, try to add information about the connector used: > + serial@12000 { Here, > + status = "okay"; > + }; > + > + usb@58000 { here > + status = "okay"; > + }; > + > + sata@a8000 { here > + status = "okay"; > + }; > + > + flash@d0000 { > + status = "okay"; > + pinctrl-0 = <&nand_pins>; > + pinctrl-names = "default"; > + num-cs = <1>; > + marvell,nand-keep-config; > + marvell,nand-enable-arbiter; > + nand-on-flash-bbt; > + nand-ecc-strength = <4>; > + nand-ecc-step-size = <512>; > + > + partitions { > + compatible = "fixed-partitions"; > + #address-cells = <1>; > + #size-cells = <1>; > + > + partition@0 { > + label = "U-Boot"; > + reg = <0x00000000 0x00600000>; > + read-only; > + }; > + > + partition@800000 { > + label = "uImage"; > + reg = <0x00600000 0x00400000>; > + read-only; > + }; > + > + partition@1000000 { > + label = "Root"; > + reg = <0x00a00000 0x3f600000>; > + }; > + }; > + }; > + > + sdhci@d8000 { here > + clock-frequency = <200000000>; > + broken-cd; > + wp-inverted; > + bus-width = <8>; > + status = "okay"; > + no-1-8-v; > + }; > + > + usb3@f0000 { here > + status = "okay"; > + }; > + }; > + > + pcie-controller { > + status = "okay"; > + > + /* > + * The two PCIe units are accessible through > + * mini PCIe slot on the board. > + */ and here for each slot > + pcie@2,0 { > + /* Port 1, Lane 0 */ > + status = "okay"; > + }; > + > + pcie@4,0 { > + /* Port 3, Lane 0 */ > + status = "okay"; > + }; > + }; > + }; > +}; then you can add my: Acked-by: Gregory CLEMENT Thanks, Gregory -- Gregory Clement, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com