From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B52332F1FEF for ; Wed, 28 Jan 2026 08:11:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769587868; cv=none; b=eFx3CCFZ7XThL26rfMQ2m2BBEvwvbDejQDhFW+ecZW6EqPB06kvLdJAzcQf09AqL16oEjrThR0s/KktK2Xlt0HYZyo+JGNMZGGJSz2tvMlYpHNTWsBEtv22NvdfPvvYFxjGiLqrSSJCYcr9+mo9oh+GrrHIdkJ5HcD0ty9v1Pho= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769587868; c=relaxed/simple; bh=WNQXs5gFTVrkuZ+otuQJ4+pToKy54lZ+FCc2lc9bXSY=; h=From:To:Cc:Subject:In-Reply-To:References:Date:Message-ID: MIME-Version:Content-Type; b=qBcPTBbKynpuaBjBaCLVlwZe0c48OOHFc0MKfuMBXYW09i7KzLQrrV1Judt8ilFVAPCTr9GEZDLxJ7F75GbfqR03b4ElwAQzkdlvoNpLoVia+lqe6F/d5DcnhhphdWg9WX3d+rXmGVi2+vQLJEmKYlPHp+2Tv2Sb5/B9OpAEwcI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=SPaheiWT; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="SPaheiWT" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C2BBCC4CEF1; Wed, 28 Jan 2026 08:11:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1769587868; bh=WNQXs5gFTVrkuZ+otuQJ4+pToKy54lZ+FCc2lc9bXSY=; h=From:To:Cc:Subject:In-Reply-To:References:Date:From; b=SPaheiWT5VJInoJxPxH5QAXJ0if0dNPsIrOkUuNLBMupsONtDgu+R9urHJM8ZuQrL qM43hffRG/6H4kpa+gqDlZOmlShWfYuV88QAzM56HwR/fIIrRn1AN6RhnQ8+hj3RX/ GK6pAJkpJe+qP7JMnRnMDn+1Cy6l4z+ko2mbTlfpotHDqt/uUZ5M/fFrs7bIqf42Jc +tKZp4QYzkoql3Y7CyCy3tyI1bOWs7MyUN9fW6R80ttyjnjQXg5dqqWOkkbtxbpzt3 94N2PG6jyD2QF930oW5BLfgKM09ZbhKzGBTrQIUYIs8TFzQBjnAJNliJb6sWRi+r5m TMZtjCJN3Iujg== From: Thomas Gleixner To: "Chang S. Bae" , linux-kernel@vger.kernel.org Cc: x86@kernel.org, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, peterz@infradead.org, david.kaplan@amd.com, chang.seok.bae@intel.com Subject: Re: [PATCH 4/7] x86/microcode: Distinguish NMI control path on stop-machine callback In-Reply-To: <20260125014224.249901-5-chang.seok.bae@intel.com> References: <20260125014224.249901-1-chang.seok.bae@intel.com> <20260125014224.249901-5-chang.seok.bae@intel.com> Date: Wed, 28 Jan 2026 09:11:04 +0100 Message-ID: <87ikcm9mxz.ffs@tglx> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain On Sun, Jan 25 2026 at 01:42, Chang S. Bae wrote: > static int load_cpus_stopped(void *unused) > { > - if (microcode_ops->use_nmi) { > - /* Enable the NMI handler and raise NMI */ > - this_cpu_write(ucode_ctrl.nmi_enabled, true); > - apic->send_IPI(smp_processor_id(), NMI_VECTOR); > - } else { > - /* Just invoke the handler directly */ > - microcode_update_handler(); > - } > + /* Enable the NMI handler and raise NMI */ > + this_cpu_write(ucode_ctrl.nmi_enabled, true); > + apic->send_IPI(smp_processor_id(), NMI_VECTOR); > + With this change the function name is completely bogus.